LONDON – NEC Corp. and Tohoku University are presenting a couple of papers on the use of magnetic RAM non-volatility with content addressable memories (CAMs) at the Symposia on VLSI Circuits and Technologies. The first is a CAM that includes non-volatile operation based on a moving domain wall form of magnetic RAM. The second is an area- and power efficient form of ternary CAM (TCAM).
The spin-CAM uses the vertical magnetization of vertical domain wall elements in a cobalt-nickel active layer in order to non-volatile storage of CAM data.
The researchers have built a 16-kbit Spin-CAM test chip in a 90-nm process with 5-ns search cycle time and a 6.6 square micron memory cell. Use of this new CAM enables the development of electronics that start instantly and consume zero electricity while in standby mode. The circuit has a write current of 200-microamps in 90-nm process technology.
Such circuits have been created before but at lower performance than traditional CAMs. In order for CAMs to be both non-volatile and to maintain a high speed, two complementary spintronics devices, spinning in opposite directions to one another, were connected within the same cell. In addition two three-terminal devices are used to separate the read current path from the write current path.
The research team is working to reduce the program current and the domain wall can be made to move with a 50-microamp current in a cobalt-iron-boron active layer. Domain-wall motion will scale further with geometry said Dr. Tadahiko Sugibayashi, senior manager of the Green Innovation Research Laboratories at NEC Corp. who is a co-author on the paper with Professor Hideo Ohno of the center of integrated spintronics research at the Univesity of Tohoku.
Magnetic domain wall motion cell. Source: NEC, Tohoku University
content addressable memories are used in certain very high speed searching applications. More likely to be used in the network for routing information than in the server.
The high-speed (the whole of the CAM can be searched for matches in one hit) come at a cost that each memory cell requires a comparison circuit.....so the cell size is many transistors compared with 1 or 4 or 6 for DRAM or SRAM, but Tohoku-NEC are cutting that down and saving standby power with developments like those described above.
I've heard of CAM in the context of forms of artificial intelligence / pattern recognition. Is that what they are going for here? It doesn't seem so from the text of this article. Am I missing something here?