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IMEC benchmarks FinFET superiority

6/16/2011 11:59 AM EDT
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myogi
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re: IMEC benchmarks FinFET superiority
myogi   6/22/2011 7:29:14 AM
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To add on jnhong's comment, one might question the relevance of the exercise if the gate length is indeed 50nm.

jnhong
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re: IMEC benchmarks FinFET superiority
jnhong   6/16/2011 9:10:06 PM
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Layout looks very good, and extremely clean. But if that 500 nm dimension line is correct, the overall bitcell size is approx. 0.80 um by 3.5 um. That corresponds more closely to the 90 nm node's bitcell size.

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