LONDON – SanDisk Corp. is expected to report one of the highlights of the International Solid-State Circuits Conference, being held in San Francisco, when it provides details of a NAND flash memory implemented in 19-nm CMOS.
The chip, set to be discussed in paper 25.8 in the non-volatile memory session of ISSCC, is a 128-Gbit monolithic device that stores 3-bits per memory cell, is the highest density IC ever produced. The chip also has a 3-bit per cell write performance of 18-Mbyte per second and a read throughput of 400-Mbits per second. The chip is a rectangle of silicon of 170 square millimeters area.
The technology is described as proof that 3-bit per cell NAND has reached a level of maturity equivalent to 1- and 2-bit per cell NAND and will be welcomed for use as motherboard memory in applications such as tablet computers and smartphones and for solid-state drives (SSDs).
In the competitive world of NAND flash memory this device is already in commericial production. Other papers at ISSCC can discuss technologies and circuit ideas that are two, four or more years away from possible commercial implementation.
SanDisk has a roadmap that sees 19-nm NAND flash ramping production in
2012, followed by a 1Y-nm process lowering the cost of 128-Gbit memory
ICs in 2013 and a 1Z-nm process taking monolithic memory to 256-Gbits
late in 2014. "We believe NAND technology will scale for a few more generations," Ritu Shrivastava, vice president of technology development at SanDisk told analysts recently.
The 128-Gbit NAND flash memory chip was developed jointly by teams from SanDisk
and Toshiba at SanDisk's Milpitas campus. The effort was led by Yan Li, director
of Memory Design at SanDisk. Products based on the 128-Gbit three-bit per cell
technology began shipping late last year and have already started to ramp into
high volume production. SanDisk has also developed a derivative product, a 64-Gbit NAND flash memory chip that is
compatible with the industry-standard microSD format. The company has also
started to ramp production of this additional chip technology.
Samsung Electronics Co. Ltd. is also set to present a sub-20nm NAND flash memory at ISSCC and with a higher read throughput of 533-Mbits per second. However the memory capacity is lower than SanDisk's at 64-Gbit.
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