In previous papers Professor Chen's team has reported on a device that showed uniform bipolar resistance switching behavior with an operation below 100 nanoseconds and a resistance on/off ratio of more than 100 and greater than 10 years retention time.
In terms of cycling endurance the team has not yet done strict testing although they have put devices through thousands of programming and erase cycles, Professor Chen said. He added that achieving the cycling endurance of nanometric NAND flash memory at 10^4 or 10^5 cycles represented a relatively easy goal. "I don't see a problem exceeding flash memory. Whether it could be used as a DRAM at 10^10 or 10^11 cycles I don't know."
The use of different electrodes is significant as there is a work function dependency in the switching. However, the use of molybdenum and platinum in particular is not required, said Professor Chen. "We chose platinum as the top electrode because it is very durable; useful for test devices."
In the present arrangement the change from high resistance state (HRS) to low resistance state (LRS), which Professor Chen calls onswitching, occurs at about -1V while the switching from LRS to HRS can be tuned to take place at voltages down to 1 volt but in the range 1-V to 10-V. Reading the state of the memory requires a lower voltage of about 0.5-V but could be taken down to 0.2-V, Professor Chen said.
These memories are not thought to be filamentary and unlike other ReRAMs, the insulator-metal transition in nanometal ReRAMs can be triggered by UV irradiation without an electric field.
Professor Chen's group has not yet made any devices with nanometer-scale lateral minimum geometries and nor has it produced any arrays of the memory devices. One of the reasons for this is that as the memory device is bipolar it will require a circuit isolation device to prevent cross-talk in an array.
The development of smaller geometry devices and arrays represents an obvious next step for the research. "We would like some companies to get interested and see if it can be done in a wafer fab setting," Professor Chen said.
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