LONDON – Nanoelectronics research center IMEC (Leuven, Belgium) is evaluating options for so-called replacement metal gate (RMG) technology to allow further transistor scaling and to follow-on to the high-k metal gate (HKMG) structures currently in use.
IMEC researchers are presenting a number of papers on the topic at the VLSI Technology Symposium taking place June 12 to 15 in Honolulu, Hawaii. IMEC partners who can benefit from its core CMOS research programs include Globalfoundries, Intel, Micron, Panasonic, Samsung, TSMC, Elpida, SK Hynix, Fujitsu and Sony.
Although RMG is a gate-last technology that is inherently more complex than gate-first integration, it has advantages in allowing a wider choice of high-k insulator and metal gate materials that can yield higher device performance, IMEC said.
IMEC considers RMG a key factor in scaling circuit integration to sub-20nm manufacturing process technology nodes. Researchers are looking at RMG integration options for different applications, materials selection and engineering, and compatibility with advanced modules and device architectures.
In RMG the the high-k gate dielectric is deposited at the beginning of the process flow or immediately prior to gate electrode deposition and the gate electrode is deposited after the formation of the junctions.
The use of a dummy gate, which is replaced, provides advantages in terms of managing channel stress in shorter devices, IMEC said. RMG also allows metal gate processes with a lower thermal budget, which broadens the the range of material options for work-function tuning and reliability control, IMEC said. Additional advantages are a lower gate resistance compared to gate-first, important for RF CMOS, and greater head room for mobility improvement.
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