NEC Corp. today said it has begun sampling a 128-Mbit SDRAM using a Virtual Channel Memory core architecture, the highest density yet for the company's new chip design.
Volume production of the 128-Mbit VCM version will begin in April. NEC introduced the virtual-channel concept in 1997, tapping temporary channels between memory cells and I/O pins to read and write data in parallel with other SDRAM chip operations.
To date, Hyundai MicroElectronics and Infineon Technologies AG have licensed NEC's VCM design. The 128-Mbit version will be available in both PC100 and PC133 SDRAM devices in a two-bank configuration. Pricing was not disclosed.
Micron Technology Inc., meanwhile, has rolled out samples of its first 100- and 133-MHz double-data-rate SDRAM -- 128-Mbit chips that the company said will operate at clock speeds of up to 266 MHz and deliver system-level bandwidth of 2.1 Gbytes/s.
The devices, which are designed to meet both PC1600 and PC2100 specification requirements, are designed for servers, workstations, and high-end PCs.
Offered in 32-Mbit x 4 and 16-Mbit x 8 configurations, the 2.5-V ICs are also available in 8-Mbit x 16 and 4-Mbit x 32 organizations for networking and graphics frame-buffer applications, according to the Boise, Idaho, memory-chip maker.
The 128-Mbit chips provide an upgrade path to 256-Mbit DDR SDRAM, which Micron said it plans to introduce in the same package and pin-out later this year. The company did not disclose pricing, but said its DDR parts are priced comparably to single-data-rate SDRAM of the same density.