MOUNTAIN VIEW, Calif.--Synopsys Inc. here has announced the promotion of Geoffrey Bunza to vice president and general manager of the Large Systems Technology Group, based in Beaverton, Ore., and Ghulam Nurie to vice president of the VERA Business Unit in Sunnyvale, Calif.
Bunza and Nurie will head teams focused on developing the company's next-generation of verification tools. They will report directly to Dave Burow, senior vice president of the High-Level Verification Group.
"Geoff and Ghulam bring a wealth of experience and innovation in creating the tools designers need to solve their most difficult system verification challenges," said Burow. "They have been a strong force in shaping some of the most innovative verification tools on the market today, including the Synopsys Eaglei hardware/software co-verification tools and the VERA testbench automation and analysis product."
Bunza is responsible for Synopsys' Logic Modeling simulation models and Eaglei systems. Prior to joining Synopsys, he was a co-founder of Eagle Design Automation, which pioneered in hardware/software co-verification tools. He has over 20 years experience in the development of electronic systems, including 14 years in engineering and general management.
He has also taught at the Massachusetts Institute of Technology, where he earned his doctorate and three other engineering degrees. He was the general manager of the Design and Analysis Division of Mentor Graphics Corp. in Wilsonville, Ore., and product line manager and director of engineering for GenRad Inc.
Nurie has more than 20 years of engineering, marketing and business experience in electronic design automation, most recently as director of marketing for Synopsys' VERA testbench automation and analysis products.
Prior to joining Synopsys, he was vice president of worldwide marketing at Systems Science Inc. and marketing director at Viewlogic Systems Inc. He has held senior engineering, marketing and management positions at a number of companies including CAE Systems/Tektronix and Viewlogic, focusing on simulation and design verification. He was one of the leaders in the effort to create and standardize the widely used VHDL design language.