SAN JOSE -- Cadence Design Systems Inc. named Mike Gianfagna as vice president and general manager of the recently formed System Level Design Group. Gianfagna will report directly to Ray Bingham, Cadence's president and CEO.
Gianfagna is responsible for managing all aspects of a fast-growing segment of the Cadence business. The System Level Design Group focuses exclusively on the need for rapid authoring, integration and verification of system-level virtual components enabling customers to bring their products to market faster. System-level products include Cierto virtual component co-design (VCC), a product for virtual component and platform design and delivery, Cierto signal processing workstation (SPW), an authoring and implementation tool and Affirma Hardware/Software verifier, a high-level verification tool.
"During his three years at Cadence, Mike has led successful worldwide marketing and applications engineering teams," Bingham said. "With 25 years of experience in the semiconductor and EDA industries, managing engineering, marketing, and sales groups, Mike is well suited to take on this new challenge."
Gianfagna joined Cadence in 1997. He most recently served as vice president of design and verification marketing at Cadence. Prior to working at Cadence, Gianfagna held marketing and engineering management positions at RCA, GE, Harris, and marketing and sales management positions at Zycad (currently Gatefield Corp.) He holds a bachelor's of science degree in electrical engineering from New York University and a master's of science degree in electrical engineering from Rutgers University.