SUNNYVALE, Calif. -- HDAC Inc., a vendor of advanced verification technology for RTL design, today announced that Lucent Technologies Inc.'s Remote Access Group has added HDAC's static functional verification tool, Solidify, to its Verilog-based design environment.
"We are using Solidify's new static approach as a way to reduce the time it takes us to verify our blocks," said Steve Shaffer, director of hardware engineering at Lucent Technologies in Alameda, Calif. "Solidify is part of our overall VLSI verification program to check corner cases and find difficult bugs in less time and with less effort."
Said Ramin Hojati, president and CEO of HDAC, "Project managers are reporting that between 50% and 70% of their staff hours are devoted to functional verification, and that the problem is growing much faster than design complexity. Ensuring blocks are clean and solid before integration ensures that chip-level testing will find fewer bugs. Solidify enables this because it typically analyzes the equivalent of an astronomical number of vectors in just seconds. We are glad to be working with Lucent Technologies remote access group to provide our new verification technology."