SAN JOSE--Users of programmable logic devices from Altera Corp. will be able to implement a 32-bit embedded processor core from Tensilica Inc. with software that's accessible over the Internet beginning in the fourth quarter this year. The two companies today announced an agreement to offer the processor core for Altera's APEX 20K series during the Embedded Systems Conference here.
The 32-bit core will be offered through Tensilica's Web-based Xtensa processor generator, which will enable design engineers to select Altera's APEX programmable logic architecture as the target silicon technology.
Designers will be able to execute multiple design iterations of the core without charge, making tradeoffs in die area, speed, power, and code density based on real-time feedback from the generator, said the companies. A license will be available once the optimal configuration is determined. A netlist will then be downloaded and ported to an Altera design environment for the PLDs.
"Utilizing the Xtensa processor on high-density APEX devices will give designers the ability to perfect the processor to meet the individual performance and feature requirements of their particular applications," said Craig Lytle, senior director of Altera's intellectual property (IP) business unit.
The Xtensa configurable processor is a 32-bit synthesizable central processing unit that can be customized by designer with their own system-specific instructions, according to Tensilica. "This new development will provide Altera customers with access to our Xtensa technology and enable them to realize systems on a programmable chip, utilizing the extraordinary configurability and flexibility inherent in our processor core and its robust instruction set architecture," said Bernie Rosenthal, vice president of marketing and business development at Tensilica.