Targeting VITA-41 switch fabrics, the VXS-1 Callisto from Tek Microsystems and QinetiQ is capable of a full duplex I/O bandwidth of up to 23 GBps through the backplane and 3 GBps through the front panel.
Designed to be hosted in a fabric switch slot within a VITA 41 (VXS) compliant backplane, Callisto is equipped with up to five Xilinx Virtex-II Pro XC2VP50 FPGAs.
This combination of FPGA technology with very high bandwidth I/O links was designed to provide an optimum environment for management, processing, and distribution of the high volumes of data that are typically generated by advanced sensors in applications such as radar, mobile communications and electronic warfare.
Callisto concentrates data streams from up to 16 VXS payload cards such as QinetiQ's Venus, Neptune A/D interfaces, or Tekmicro's JazzStream I/O carriers.
Callisto can also operate to fan data out to multiple processing resources on VXS payload cards in applications where a work farm of processing resources is required. The use of FPGAs to implement the high bandwidth backplane links allows a high degree of flexibility for users to choose and modify the data communication protocol employed across the VXS backplane network fabric.
Callisto also supports connections of up to 12 links on the front panel with up to 250 MB/s on each link. The front panel links may be used to interface with other system components (e.g. sensor front ends) which may be located remotely, or to provide a bridge to separate chassis such as legacy processing racks.
The front panel links are implemented using Small Form Pluggable (SFP) modules which can be populated with fiber optic or copper transceivers to support a wide range of protocols such as Gigabit Ethernet, Fibre Channel, Infiniband or Serial FPDP.
Using the front panels connection for I/O, Callisto can also act as a standalone FPGA sensor processing resource or co-processing resource if other VXS cards are not required.
Callisto utilizes Xilinx Virtex-II Pro FPGAs to interface to the high bandwidth VXS backplane links. Each FPGA has a large logic resource and is also equipped with 128 MB of memory, providing a highly flexible platform to implement processing functions.
The Quixilica Callisto VXS-1 is available from TEK Microsystems 60 days ARO. Pricing starts at $21,000 for single unit quantities.
TEK Microsystems, Inc.
44 (0)8700 100 942