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Anobit addresses 'plummeting' flash endurance

3/8/2011 04:20 PM EST
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Robotics Developer
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re: Anobit addresses 'plummeting' flash endurance
Robotics Developer   3/8/2011 8:18:19 PM
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It sounds good but not sure. What will the endurance numbers be if their chip is used? The article is a nice marketing piece with no information. I was hoping to see some numbers so that the improvement was understood and not just "better". Is this too early in the development cycle for any measurements to have been made or available?

Dror Salee
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re: Anobit addresses 'plummeting' flash endurance
Dror Salee   3/8/2011 8:36:50 PM
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This product is shipping in volume. Endurance meets the customer/application needs. In Smartphones, it is typically in the low thousands program/erase (P/E) cycles plus 1yr retention. Anobit has announced an enterprise SSD which meets endurance spec which is equivalent to 50,000 P/E cycles, using standard off-the-shelf MLC NAND, typically spec'd at 3,000 P/E cycles. I hope this helps. Dror Salee, Anobit

Code Monkey
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re: Anobit addresses 'plummeting' flash endurance
Code Monkey   3/8/2011 8:47:30 PM
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Wear leveling and FEC are nothing new in SD cards, thumb drives and SSDs. Otherwise, the FAT table (written every time you write to a file) wouldn't last long. A flash manager needs to remember sectors that go bad, provide wear leveling, and do forward error correction among other things. A press release wouldn't necessarily say "Ours is better than Theirs because...".

Dror Salee
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re: Anobit addresses 'plummeting' flash endurance
Dror Salee   3/8/2011 9:14:32 PM
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You are correct about wear leveling and error correction codes. This product has something else, which we call Memory Signal Processing. It is about applying signal processing methods to the analog voltage levels inside the memory array.

Robotics Developer
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re: Anobit addresses 'plummeting' flash endurance
Robotics Developer   3/9/2011 3:44:53 AM
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Yes, thank you!! I love hearing the details that sounds like quite an improvement. I would have put that into the brief press releases and articles to really stir up interest.

PTCHIANG
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re: Anobit addresses 'plummeting' flash endurance
PTCHIANG   3/9/2011 6:20:48 AM
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Does MSP tuned voltage levels mean any reduction in MLC's capacity(density) for the user? costs in exchange for a better endurance.

Dror Salee
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re: Anobit addresses 'plummeting' flash endurance
Dror Salee   3/9/2011 9:20:12 AM
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Absolutely no. MSP is all about using mathematics to help the physics.

Dror Salee
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re: Anobit addresses 'plummeting' flash endurance
Dror Salee   3/9/2011 9:21:31 AM
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You are correct... It is in mentioned in the press release, but not always picked up by the press.

HAL..4
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re: Anobit addresses 'plummeting' flash endurance
HAL..4   12/14/2011 3:41:52 PM
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Poor endurance is just one aspect of newer NAND devices that is problemmatic. The other is increasing latency because of the much slower multi-level cells and the the increasing time neeeded for error correction before any of the retrieved data can be used. Cell latency used to be of the order of 20-30uS and 1-bit error correction added almost nothing to that. Now cell latency is 80uS or more and typical NAND controllers add far more. Our application, which demands low random access latency, used to be practical with NAND but with present trends, may become impractical before we can deliver a product. Does the MSP controller help the latency issue?

Peter Clarke
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re: Anobit addresses 'plummeting' flash endurance
Peter Clarke   12/14/2011 4:07:42 PM
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@HAL..4 I don't know about latency. The fact they don't mention it suggests maybe not. In fact the clever MSP stuff my increase latency. If you find out please share with the group.

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