LONDON – Sidense Corp. a provider of fuse-based logic non-volatile memory IP cores has announced that it has ported its single-transistor per bit, one-time programmable SLP line of products to the 180-nm ONC18 process from On Semiconductor.
ONC1 is a 180-nm minimum geometry digital and mixed-signal technology platform. SLP is a smaller, lower power version of the SiPROM product family with a maximum macro size of 256-kbits. SLP macros target cost- and power-sensitive applications such as handheld communication devices, chip and product IDs, analog trimming and calibration, and code storage.
A licensing agreement makes the SLP macros available for use on On Semiconductor's ASSPs and for ASIC customers of On who wish to include the SLP technology in their designs fabricated by On Semiconductor.
"We chose Sidense's OTP intellectual property for its low power and small area and also because it doesn't require any changes or additions to our standard process flow," said Bob Klosterboer, On Semiconductor senior vice president of the digital and mixed-signal product group, in a statement issued by Sidense.
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