LONDON – Toshiba has announced the development of BENAND, a form of single-level cell, NAND flash memory with embedded error correction code (ECC).
Until now, the ECC has been embedded in the host processor and corrected 1 bit per 512 bytes. However, diminishing process geometries increase the need for improved error correction, Toshiba said. BENAND removes the burden of ECC from the host processor while minimizing protocol changes and allowing host processors to support leading-edge process NAND flash memory in a timely manner, Toshiba said.
The product is initially available in 4-Gbit and 8-Gbit memory capacities and is implemented in a 32-nm CMOS process technology. The error correction can be used to find and correct 4-bits in every 512-bytes, which is four times higher than previous ECC schemes applied to NAND flash memory. The BENAND range offers package- and pin-compatibility with general SLC NAND flash memory.
Samples of BENAND products are available now in TSOP and BGA packages, with mass production beginning March 2012.
Applications for BENAND memory are likely to include LCD television, digital cameras, robots and other industrial applications, home gateways, cable boxes, point-of-sale systems, smart meters, vending machines, in-flight entertainment systems and LCD advertising systems.
Toshiba plans to expand the BENAND lineup to include 24nm process NAND flash memory products in Q2 2012.
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