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Freescale ups ante with quad-core Qorivva

4/24/2012 06:16 PM EDT
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vediappan
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re: Freescale ups ante with quad-core Qorivva
vediappan   12/21/2012 12:49:38 PM
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Automotive microcontrollers are just as safety conscious as the Space Shuttle, since human lives are at risk, which is why Freescale adopted a similar strategy to have a completely redundant core whose results are compared with the main core at each time step, allowing errors to be corrected before they cause loss of life.

R_Colin_Johnson
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re: Freescale ups ante with quad-core Qorivva
R_Colin_Johnson   4/25/2012 4:39:15 PM
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The redundant core is performing every operation that the main core performs, just one clock step behind, which is then compared with a special error detection and correction unit. If the error can be corrected, it is, if it cannot, then the whole system goes into "limp home" mode, where the driver is instructed to take the car in for maintenance ASAP.

Neo10
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re: Freescale ups ante with quad-core Qorivva
Neo10   4/25/2012 3:02:57 AM
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So in effect the performance is still low enough for every computation to be done by a single core. Or is it just doing the data correction for memory to peripheral transactions?

R_Colin_Johnson
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re: Freescale ups ante with quad-core Qorivva
R_Colin_Johnson   4/24/2012 11:00:40 PM
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Automotive microcontrollers are just as safety conscious as the Space Shuttle, since human lives are at risk, which is why Freescale adopted a similar strategy to have a completely redundant core whose results are compared with the main core at each time step, allowing errors to be corrected before they cause loss of life.

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