Although dedicated suites of MEMS design tools are becoming available, they can be priced beyond the reach of many small companies that are innovating in this growing area. As an alternative, low-cost PC-based IC tools are being used to design microelectromechanical systems as well as ICs.
Users of these programs must recognize the specific complexities of their MEMS design and see if the software will be able to support their product fabrication and manufacturing life cycle. For simple microfluidic channels requiring a couple of masks, these programs may be just right. But for complex geometries and multiple mask layers, the time and money wasted in error checking, parametric-object construction and other steps may outweigh any initial cost savings.
Because MEMS processes are derived from photolithographic microelectronic processes, it is natural to consider IC design tools for creating masks for MEMS devices. However, fundamental differences exist between IC and MEMS design that range from the nature of the layout to the type of verification or simulation and, most important, to fabrication.
Using IC CAD tools poses interesting issues when large numbers of curved objects are used in the MEMS design. Curved objects have to be made discrete and placed on a much finer grid than in IC foundry processes to ensure mechanical "smoothness." Furthermore, the IC layout tool now has to be able to work with polygons (resulting from the discretized curves) with thousands of points.
Managing this data may slow rendering and drawing operations. Working with curves and polygons requires the appropriate drawing commands as well as accurate geometric-positioning tools that make it possible to snap to a midpoint, radius and corner. In the IC world, snapping to an exact center or a specific distance from a certain logic gate may not be as important as it is for MEMS designers, who may need to precisely place a resistor for mechanical or inertial purposes in the center of a membrane or curved beam element.
Furthermore, IC tools may not be able to parametrically construct complex curves or objects, forcing the designer to input detailed x,y coordinates to draw similar versions of the same device.
Algorithm-to-layout generation is not normally available in low-cost IC tools, so the designer may have to use programs such as Matlab or Excel to create x,y points, which are then entered into the CAD tool. Consequently, these objects are "static" and cannot be edited seamlessly.
Unlike the mature IC-processing field, from the very initial stage the MEMS designer must always think of "process" as well as the mechanical physics of the device. In MEMS electromagnetic actuators, for example, three-dimensional coils are often difficult to fabricate. In fact, the 2-D nature of MEMS fabrication processes often limits the optimal electromechanical design. Thus, designers have had to do their best with novel layering techniques and constant process trade-offs to effect the proper magnetic fields.
Closely tied to fabrication are process characteristics and artifacts, which have to be compensated for directly in the CAD tool. This mask data preparation is performed at the layout-design level in MEMS, and may take the form of an extra border around one mask layer in relation to another to account for alignment or liftoff processes. Alternatively, a Boolean or logic operation with an offset may be required from a deep reactive-ion etch mask layer to a gold electroplating mask. In L-Edit, all these operations can be performed in a single step on complex polygons such as arcs, circles and the like on entire layers. These algorithmically generated layers obviate time-consuming copy, paste and scaling operations on an object-by-object level in some CAD tools.
MEMS designers have to take special care with these large curved polygons, since they generally end up with a huge amount of vertices when polygonized to satisfy GDSII requirements. Mask shops normally allow only 200 vertices per polygon. L-Edit can detect these polygons and automatically fracture them into smaller polygons upon GDSII stream-out.
MEMS processes are proprietary within a company and often unique in material selection, layer order and so on. Indeed, only a few standard processes exist. Therefore, layout verification is difficult and fledgling MEMS companies seldom do automated layout-to-schematic check.
However, customized design rule checking (DRC) can be used to hunt for the simple layout and design errors that typically crop up in a MEMS design. Until recently, DRC in low-cost IC tools worked only on 45° and orthogonal objects. Currently, DRC in better tools can check for minimum spacing between any polygonal objects, across various layers.
One common mistake arises from the orders-of-magnitude size differences between objects in MEMS designs. Two objects may appear connected on the monitor, but in reality they may be disjointed and between grid points. This kind of error is costly if it goes unnoticed during tapeout. DRC that can work with curves and polygons can eliminate these errors.
Amish Desai (email@example.com) is the MEMS product development manager at Tanner Research Inc. (Pasadena, Calif.).
Components like magnetic actuators need layout tools that can draw precision curves.
Source: Tanner Research Inc.