A surface micromachining technology for building microelectromechanical sensor and actuator systems in silicon stands out for its ability to fashion suspended structures that are anchored to the substrate by highly compliant springs. The process flow marries steps borrowed from state-of-the-art IC technology with such dedicated MEMS operations as high-aspect-ratio dry etching and sacrificial-layer removal. Called Thelma (thick epipoly layer for microactuators and accelerometers), it is distinguished from conventional micromachining mainly by its 15-micrometer-thick polysilicon epitaxial layer.
The Thelma process allows relatively thicker silicon structures than conventional micromachining. That increases the area of vertical surfaces and, therefore, the global capacitance in electrostatic actuators that move in parallel to the substrate. Thelma also allows higher mass values, which enable more sensitive devices. The greater thicknesses produced by the process minimize cross-sensitivity errors. Chip area is reduced, overcoming a common design limit of bulk micromachining.
Also, compared with standard micromachining, Thelma allows higher mass values, which in turn enable more sensitive devices. The greater thicknesses produced by the process also minimize cross-sensitivity errors. Just as important, the technology reduces chip area, overcoming a common design limitation of bulk micromachining.
Reliability tests confirm polysilicon to be well-suited for long fatigue life and shock resistance. In addition, the process exhibits excellent and repeatable electrical and mechanical properties for the structural epitaxial polysilicon layer. Conveniently, those properties such as Young's modulus, residual stress and stress gradient can be automatically monitored through the inline construction, directly onto the device, of ad hoc test structures.
The Thelma process sequence comprises six main steps: substrate thermal oxidation, deposition and patterning of horizontal interconnections, deposition and patterning of a sacrificial layer, epitaxial growth of the structural layer, structural layer patterning by trench etch, and sacrificial oxide removal and contact metallization deposition.
In substrate thermal oxidation, the silicon substrate is covered with a 2.5-micrometer layer of permanent oxide obtained using a thermal treatment at 1,100°C. Next, the first polysilicon layer is deposited above the thermal oxide to achieve the deposition and patterning of horizontal interconnections. This layer defines the buried runners, which are used to bring potential and capacitance signals outside the device.
In the sacrificial-layer step, a 1.6-micrometer oxide layer is deposited using plasma-enhanced chemical vapor deposition. This layer and the thermal oxide layer together form a 4.1-micrometer layer that separates the moving part from the substrate. This step is analogous to making the sacrificial layer in a conventional surface micromachining process.
Epitaxial growth of the structural polysilicon layer involves growing a 15-micrometer-thick epitaxial polysilicon in reactors. Structural layer patterning forms the mobile parts structure by etching a deep trench that reaches down to the oxide layer.
In the last main process step sacrificial oxide removal and contact metallization deposition the sacrificial oxide layer is removed with a chemical reaction to avoid any stiction caused by attractive capillary reactions. For maximum effectiveness, this step is done under rigorously dry conditions. Finally, the contact metallization is deposited. This will be used to make the wire bonds between the device and the metallic lead frame. The final structure of the silicon is formed by a series of single crystals in the shape of vertical columns, each grown in an epitaxial reactor.
It must be noted that the thermal treatments applied during the process can produce residual stresses in the resulting MEMS devices. Dedicated test structures such as Pivot- or gamma-shaped specimens are used to make an experimental determination of these stresses. Test findings suggest that these residual stresses are of a compressive nature and very low in value, below 10 MPa, and that they occur in the polysilicon layer running parallel to the substrate. The stress gradient of the layer is also very well-controlled. From an analysis of SEM images, in fact, the maximum differential out-of-plane displacement for test beams is found to be less than 1 micrometer over a length of 1,000 micrometers.
The Thelma process can enable such devices as an analog-output inertial three-axis sensor that can measure static and dynamic accelerations of 2 g's or 6 g's (full scale, user selectable) over a maximum bandwidth of 4 kHz in the x and y directions and 2.5 kHz in the z direction. Resolution is 0.5 mg's over a 100-Hz bandwidth. Other features of the family include 2.4- to - 5-volt single-supply operation, output voltage offset and sensitivity that are ratiometric to the supply voltage, embedded self-test capability, high shock resistance and factory trimming. Digital output accelerometers with 2.4- to 3.6-V single-supply operation, 1.8-V compatible I/Os and I2C/SPI digital output interfaces are also available.
The accelerometer chip can be used by customers as the foundation for motion-activated functions in mobile terminals, automotive antitheft and inertial navigation systems, gaming and virtual-reality input devices, vibration monitoring and compensation systems, and appliance and robot controls.
Biagio De Masi (email@example.com) is a MEMS designer for STMicroelectronics' Research and Development and MEMS Development Unit (Cornaredo, Italy), and Sarah Zerbini is inertial sensor team leader for the MEMS Business Unit at STMicroelectronics (Castelletto, Italy).