The 4-20mA current loop offers a common technique for transmitting sensor information in industrial process-monitoring applications. (Sensors measure physical parameters such as temperature, pressure, speed, and liquid flow rates.) Current loops are particularly useful when the information must travel a long distance to a remote location. Current-loop signals are relatively insensitive to noise, and their power can be derived from a remotely supplied voltage.
Loop operation is straightforward
The output voltage from a sensor is first converted to a proportional current, in which 4mA normally represents the sensor’s zero-level output, and 20mA represents the full-scale output. A receiver at the remote end converts the 4-20mA current back to a voltage, which can be further processed by a computer or display module.
The circuit for a typical 4-20mA current loop consists of four elements: a sensor/transducer, a voltage-to-current converter, a loop power supply, and a receiver/monitor. In loop-powered applications, the sensor drives the voltage-to-current converter, and the other three elements are connected in series to form a closed loop (Figure 1).
Figure 1. A 4-20mA loop-powered circuit.
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Smart 4-20ma transmitter
The old-fashioned way to build a 4-20mA transmitter included a field-mounted device that sensed a physical parameter and generated a proportional current in the standard range 4-20mA. Second-generation 4-20mA transmitters, called “smart transmitters” and developed in response to industry demand, use a microprocessor and data converter to condition the signal remotely.
Smart transmitters can normalize gain and offset, linearize the sensor by converting its analog signal to digital (RTD sensors and thermocouples, for instance), process the signals with arithmetic algorithms resident in the μP, convert back to analog, and transmit the result as a standard current along the loop.
Third-generation 4-20mA transmitters (Figure 2) are considered “smart and intelligent.” They add to the smart transmitter a capability for digital communications, which share the twisted-pair line with the 4-20mA signal. The resulting communication channel makes it possible to transmit control and diagnostic signals along with the sensor data.
Figure 2. A smart and intelligent 4-20mA transmitter.
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The communication standard used by smart transmitters is the Hart protocol, which employs frequency shift keying (FSK) and is based on the Bell 202 telephone communication standard. Bits 1 and 0 of the digital signal are represented by the frequencies 1200Hz and 2200Hz, respectively. Sine waves at these frequencies are superimposed on the sensor’s dc analog signal to provide simultaneous analog and digital communications (Figure 3).
Figure 3. Simultaneous analog and digital communications.
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The 4–20mA analog signal is not affected because the average value of the FSK signal is always zero. The digital states can change 2–3 times per second without interrupting the analog signal. The minimum allowed loop impedance is 23Ω.
Which microcontroller for a smart 4-20mA transmitter?
The microcontroller used in this application must include a serial interface, used to drive the ADC for data acquisition and the DAC for setting loop current, a multiply-accumulate unit (MAC), which implements a digital filter applied to the input signal and also encodes and decodes the two frequencies of the Hart Protocol, and low power consumption (the current budget is 4mA).
Those features are available in a new family of microcontrollers from Dallas Semiconductor/Maxim (Figure 4). Members of the MAXQ family of RISC microcontrollers include analog functions, and they implement a clock-management scheme that provides a clock only to those blocks currently in use. If, for example, an instruction involves only the Data Pointer (DP) and Arithmetic Logic Unit (ALU), the clock is applied to those two blocks only. The result is reduced power consumption and lower switching noise.
Figure 4. MAXQ Architecture.
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In addition, advanced power-management features minimize power consumption by dynamically matching the processing speed of the device to the performance level required. Thus, the device can minimize power consumption during periods of reduced activity by slowing its operation. To apply more processing power, the microcontroller increases its operating frequency.
Software-selectable clock-divide operations allow the flexibility of implementing a system clock cycle in 1, 2, 4, or 8 cycles of the oscillator. By performing this function in software, the P can enter a lower-power state without the cost of additional hardware. Three additional low-power modes are available for extremely power-sensitive applications:
- PMM1: divide-by-256 power-management mode
- PMM2: 32kHz power-management mode (PMME = 1, where PMME is
BIT 2 of the system clock-control register)
- Stop mode (STOP = 1)
In PMM1 mode, one cycle of the system clock equals 256 oscillator cycles, which substantially reduces power consumption while the P operates at reduced speed. PMM2 mode allows the device to run even slower, using the 32kHz oscillator as a clock source. The optional switchback feature allows enabled interrupt sources such as external interrupts, UARTs, and the SPI module to quickly exit the power-management modes and return to a faster internal clock rate. All these features provide a processing performance of 3MIPS/mA far better than the closest alternative processor (Figure 5).
Figure 5. MAXQ performance in MIPS/mA.
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The MAC inside a MAXQ μP implements the signal processing required by a 4-20mA application. The analog signal is presented to an ADC, and the resulting stream of samples is filtered in the digital domain. A general filter can be implemented using the following equation:
y[n] = Σbix[n-i] + Σaiy[n-i],
where bi and ai characterize the system’s feedforward and feedback responses, respectively. Depending on the values of ai and bi, a digital filter can be classified as a finite impulse response (FIR) or an infinite impulse response (IIR). When the system contains no feedback elements (all ai = 0), the filter is an FIR type: y[n] = Σbix[n-i]. If both the ai and bi elements are non-zero, however, the filter is an IIR type.
As you can see from the equation for an FIR filter, the main mathematical operation is to multiply each input sample by a constant and then accumulate each of the products over the n values. Those operations are illustrated by the following C fragments:
The multiply-accumulate unit of a MAXQ μP performs this operation with an execution time of 4 + 5n cycles, and with a code space of only 9 words (vs. the 12 words required by a traditional microprocessor and multiply unit).
Within the MAXQ multiply-accumulate unit, note that a requested operation occurs automatically when the second operand is loaded into the unit, and the result is stored in the MC register. Note also that the MC register width (40 bits) can accumulate a large number of 32-bit multiply results before it overflows. That capability improves on the traditional approach, in which overflow must be tested after every atomic operation.
Because the MAXQ architecture was designed with the analog world in mind, future versions will integrate analog functions such as high-resolution ADCs and DACs. Such μCs will allow designers to realize high-performance systems-on-chip.
The first member of Maxim’s MAXQ family is a low-power, 16-bit microcontroller called the MAXQ2000. It incorporates an interface for liquid-crystal displays (LCDs) that drives up to 100 (-RBX) or 132 (-RAX) segments. Though highly appropriate for blood-glucose monitoring, the MAXQ2000 is suitable for any application that requires high performance with low-power operation. It operates at a maximum of 14MHz (VDD > 1.8V) or 20MHz (VDD > 2.25V).
The MAXQ2000 includes 32kwords of flash memory (for prototyping and low-volume production), 1kword of RAM, three 14-bit timers, and one or two universal synchronous/asynchronous receiver/ transmitters (UARTs). For flexibility, separate supply voltages power the microcontroller core (1.8V) and the I/O subsystem. An ultra-low-power sleep mode makes the parts ideal for portable and battery-powered equipment. See Sidebar 2 for a detailed listing of MAXQ2000 features.
Evaluation of the powerful MAXQ2000 is made possible through use of the MAXQ2000EVKIT, a complete hardware development environment for the MAXQ2000 microcontroller (Figure 6).
Figure 6. Block diagram for the MAXQ2000 EVKIT.
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It has the following characteristics:
- On-board power supplies for the MAXQ2000 core and VDDIO supply rails.
- Adjustable power supply (1.8V to 3.6V), which can be used for the VDDIO or VLCD supply rails.
- Header pins for all MAXQ2000 signals and supply voltages.
- Separate LCD daughterboard connector.
- LCD daughterboard with 3V, 3.5-digit static LCD display.
- Full RS-232 level drivers for serial UART (line 0), including flow control lines.
- Pushbuttons for external interrupts and microcontroller system reset.
- MAX1407 multi-purpose ADC/DAC IC, connected to the MAXQ2000 SPI bus interface.
- 1-Wire interface and 1-Wire EEPROM IC.
- Bar graph LED display for levels at port pins P0.7 to P0.0.
- JTAG interface for application load and in-system debugging.
Thus, the MAXQ2000EVKIT board has all the functions needed to implement a smart 4-20mA transmitter: a low-power microcontroller with true multiply-accumulate unit (for filtering and tone encode/decode), ADC for sensor reading, and a D/A converter for generating the analog output signal (Figure 7). With the addition of a low-power codec like the MAX1102, you can also implement a HART Modem.
Figure 7. A 4-20mA transmitter based on the MAXQ2000 microcontroller.
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HART modem implementation
The MAC can be used to implement functions requested by a HART modem, if the system includes a tone encoder for 1200Hz and 2200Hz (representing bits 1 and 0), and also tone detection for those frequencies.
To generate the required sinusoids, you can implement a recursive digital resonator as a two-pole filter described by the following difference equation:
Xn = k * Xn-1 – Xn-2,
where the constant k equals 2 cos(2π*tone frequency/sampling rate). The two values of k can be precomputed and stored in ROM. For example, the value required to produce a tone at 1200Hz with 8kHz sample rate is k = 2 cos(2π*1200/8000).
You must also calculate the initial impulse required to make the oscillator begin running. If Xn-1 and Xn-2 are both zero, then every succeeding Xn will be zero. To start the oscillator, set Xn-1 to zero and set Xn-2 as follows:
Xn-2 = -A*sin[2π (tone frequency/sampling rate)].
Assuming a unit sine wave for our example, this equation reduces to Xn-2 = -1sin[(2π (1200/8000)]. To further reduce it to code, first initialize the two intermediate variables (X1, X2). X1 is initialized to zero, and X2 is loaded with the initial excitation value (calculated above) to start the oscillation. Thus, to generate one sample of the sinusoid, perform the following operation:
X0 = kX1 – X2
X2 = X1
X1 = X0.
The calculation of each new sine value requires one multiplication and one subtraction. With a single-cycle hardware MAC on the MAXQ microcontroller, the sine wave can be generated as follows:
Because we need detect only two frequencies, we use the modified Goertzel algorithm, which can be implemented as a simple second-order filter (Figure 8).
Figure 8. The Goertzel algorithm implemented as a simple second-order filter.
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To use it to detect a particular frequency, you first (at compile time) compute the value of a constant using the following formula:
k = tone frequency/sampling rate
a1 = 2cos(2πk).
First, initialize the intermediate variables D0, D1, and D2 to zero, and perform the following for each sample X received:
D0 = X + a1*D1 – D2
D2 = D1
D1 = D0.
After a sufficient number of samples has been received (usually 205 samples for an 8kHz sample rate), compute the following using the latest computed values of D1 and D2:
P = D12 + D22 - a1 * D1 * D2.
P now contains a measure of the squared power of the test frequency in the input signal.
To decode the two tones, we process each sample with two filters.
Each filter has its own k value and its own set of intermediate variables. Each variable is 16 bits long, so the entire algorithm requires 48 bytes of intermediate storage.