The operation of a D/A converter is, in principle, very simple: given a digital
input, it provides an accurate output voltage. In reality, the accuracy of the
output voltage is subject to a number of factors, including gain and offset
errors from the D/A converter and from other components in the signal chain. The
system designer must compensate for these errors in order to get the highest
possible output accuracy.
One solution is to add extra components to remove the
errors through post-manufacture trimming. Some D/A converters have internal
trimming registers that allow the user to calibrate out whatever errors exist in
the system so that a digital code sent to the D/A converter will produce the
correct output voltage. This design note will explain the steps required to
reduce the system error using a software solution rather than a hardware one.
The two error mechanisms common to all D/A converters are offset and gain error.
Offset error is the deviation from the minimum voltage expected when the minimum
code is applied. For example, for a unipolar D/A converter a code of 0x0000
should provide the lowest possible output voltage. While the D/A is likely to
have been factory calibrated to have inherently low offset, amplifiers and other
components in the signal chain will add to the total offset value. The total
offset in a signal chain is called the system offset. The system offset can be
removed using the on-chip registers, as described later.
Gain error is the deviation in the slope of the transfer function, when the
offset error is removed, from the ideal. For example a D/A converter may be
required to start at 0 V and finish at 5 V, the actual transfer function may
start at 5 mV and finish at 5.015 mV. In this case the gain error is 10 mV,
(Click to Enlarge Image)
Figure 1: Offset and gain errors in converters.
Figure 2 shows a simple signal chain comprising one channel of the AD5390
16-channel, 14-bit D/A converter and an amplifier.
(Click to Enlarge Image)
Figure 2: One channel of the AD5390 shows signal path and registers.
The AD5390, as shown,
includes trimming registers. The final output voltage in the signal chain is
determined by both the digital code applied to the D/A and by the contributions
of the gain and offset errors of the D/A and the amplifier. The c and m
registers of the D/A can be used to reduce these errors. The registers work on
the basis that a straight line can be described by the formula
y = mx + c.
Using this, and applying it to the transfer function for the D/A converter, it can be seen
that the output voltage (y) of the D/A is not just related to the digital input
code (x) but is also affected by the values of m and c. If the m and c registers
are programmed so that they cancel out the system gain and offset errors, the
system output voltage will become more accurate.
The transfer function of the AD5390 is given in the data sheet as:
x2 = (m + 2)/16384 · x1 + (c - 8192)
where m = 16,382 and c = 8,192 by default, x2 is the value that will be
loaded to the D/A, and
VOUT = 2 · VREF · x2/16384.
If the default values for m and c are used, the value loaded to the DAC register
(x2) will be the same as the input value (x1); that is, there is no adjustment
for offset and gain errors. The next sections describe how the m and c registers
are used to reduce the system gain and offset errors.
Removing the system offset error
Before we can begin adjusting the c register, we must understand how much of a
change each bit in that register makes. The output span of the AD5390 is given
as 2 · VREF. Thus, for a 2.5-V reference, the output span is 5 V. Since there are
16,384 code steps for a 14-bit D/A, each step gives a change of
This is 1 LSB. Using the correct value for the c register
will reduce the offset error below this value.
To measure the system offset we must set the D/A channel to its minimum voltage.
The system output voltage is then measured and compared to the expected output
voltage. The offset error is the difference between the two.
If the system has an offset measured at +5 mV, then we require
5 mV/305.175 μV = 16 steps
to correct the offset.
This implies that to reduce the +5 mV offset as much as possible, we need to
program the c register with 8,192 - 16 = 8,176. While the offset has not been
eliminated completely, it has been reduced to:
5 mV · (16 · 305.175 μV) =
Removing the gain error
With the system offset error reduced, we can now calibrate out the system gain
error. As mentioned earlier, the gain error is the deviation of the slope of the
transfer function from the ideal. Since the transfer function is a straight
line, the worst-case excursion from the ideal will be at the top end of the
transfer function, i.e., the highest voltage. Moving that voltage as close as
possible to the ideal value will have the effect of ensuring that the system
gives the most accurate output voltage for any given D/A code.
To calculate the value required by the m register, the user should write 0x03FFF
to the D/A channel, which gives the maximum output voltage. In an ideal world,
this would be:
+5 V − 1 LSB = 4.999695 V.
If, in our example, the system output
voltage is measured at 5.0067 V, then we have a gain error of approximately 7
mV. Using the same LSB value as before, we find that the m register needs to be
7 mV/305.175 = 20 steps
Thus, setting the m register to (16,382 - 20) = 16,362 will reduce the gain
error to within 1 LSB.
The calibration routines described above can either be performed as part of a
one-time factory calibration, where the values for the m and c registers can be
stored in an E2PROM,and loaded as part of the system startup procedure, or the
system can be designed to measure the output voltages periodically and adjust
the m and c registers as required.
For the latter, a high-quality A/D converter
is typically used. The outputs of each of the D/A channels would be connected in
turn to the A/D input and the voltage is calculated. This is achieved using a
multiplexer. The AD5390 has an on-chip multiplexer/monitor function that makes
the designer's job easier and reduces the number of external components. Each of
the 16 voltage outputs can be switched internally, so that they appear on a
single output pin connected to the measuring A/D.
This will allow the designer
to remove the errors in the D/A. To remove system errors, the AD5390 must have
input pins connected to the multiplexer, allowing external voltages to be
monitored in the same way. Figure 3 shows a typical application example.
(Click to Enlarge Image)
Figure 3:A typical application shows how errors across multiple applications are handled.
Using the methods described above, it is typically possible to reduce gain and
offset errors from the tens-of-millivolts range to below 100 μVolts. This
has the obvious advantage of providing much more accurate systems without the
expense of more costly D/A converters or of adding extra components to
accomplish the same task.
About the author
Ken Kavanagh is a senior applications engineer
supporting the precision converter product line at Analog Devices, Inc., Limerick,
Ireland. He received a national diploma in electronics from Waterford Institute
of Technology in 1991 and a bachelor of engineering degree from the University
of Limerick in 1996. He can be reached at email@example.com.