High-side load switches and their operations continue to be popular choices for many engineers and designers, for applications including battery-powered portable devices such as feature-rich mobile handsets, mobile GPS equipment, and consumer entertainment gadgets. This article takes an easy-to-understand and non-mathematical approach to explain the various aspects MOSFET-based high-side load switches and discusses the various parameters that must be considered throughout the design and selection process.
The definition of a high-side load switch is that it is controlled by an external enable signal, and connects or disconnects a power source (battery or adaptor) to a given load. Compared to a low-side load switch, a high-side switch sources current to the load, while the low-side type connects or disconnects the load to ground, and therefore sinks current from the load.
The high-side load switch differs from a high-side power switch. The high-side power switch manages the output power and, therefore, typically limits its output current. Conversely, the high-side load switch passes the input voltage and current to the loadand, as such, it does not incorporate the current-limiting function.
The high-side load switch consists of the following three elements:
- A pass element, which is essentially a transistor which is typically an enhancement-mode MOSFET. The pass element operates in the linear region to pass the current from the power source to the load, as a switch does (as opposed to an amplifier).
- A gate-control block, which provides a voltage to the gate of the pass element to switch it ON or OFF. It is also called level-shift block, referring to the fact that an external enable signal is level-shifted to create high- or low-enough gate voltage (bias) to switch the pass element fully ON and OFF.
- An input logic block, whose main function is to interpret the enable signal and trigger the gate control block, to switch the pass element ON and OFF.
The pass element is the most fundamental part of the high-side switch. The most frequently looked at parameters, especially the resistance of the switch while it is ON (RDSON), are directly related to the structure and characteristics of the pass element.
Because the enhancement-mode MOSFET typically consumes less current during operation, leaks less current during shutdown, and provides more thermal stability than a bipolar transistor, it is more widely used as the pass element in the high-side load switches. As such, this article will focus exclusively on the enhancement-mode MOSFET based pass element.
The enhancement-mode MOSFET pass element can be either an N-channel or a P-channel FET.
The N-channel FET is fully switched ON, or in its linear region, when its gate voltage (VG) is higher than its source voltage (VS) and drain voltage (VD) by a threshold value (VT). The following formulas give the mathematical representation of the ON conditions:
VG - VS = VGS > VT
VG - VT > VD, or VGS - VT > VDS
where VG is the gate voltage; VS is the source voltage; VD is the drain voltage; VT is the threshold voltage of the FET; VGS is the voltage drop from the gate to the source; and VDS is the voltage drop from the drain to the source. (All symbols represent positive numbers.)
When the N-channel FET is ON, the drain current, ID, is "positive" and flows from the drain to the source, see Figure 1 and Figure 2.
Figure 1: Figure 1 . An N-channel FET high-side load switch with internal charge pump.
(Click to Enlarge Image)
Figure 2: Figure 2. An N-channel FET high-side load switch with external VBIAS input.
(Click to Enlarge Image)
The P-channel FET is fully switched ON, or in its linear region, when its gate voltage (VG) is lower than its source voltage (VS) and drain voltage (VD) by a threshold value (VT):
VS - VG = VSG > VT
VD - VT > VG, or VSG - VT > VSD
Where VG is the gate voltage; VS is the source voltage; VD is the drain voltage; VT is the threshold voltage of the FET; VSG is the voltage drop from the source to the gate; and VSD is the voltage drop from the source to the drain. (Again, all symbols represent positive numbers.)
When the P-channel FET is ON, the drain current, ID, is "negative" and flows from the source to the drain, Figure 3.
Figure 3: A P-channel FET high-side load switch.
(Click to Enlarge Image)
The N-channel FET uses electrons as the majority carriers, which have higher mobility than holes, the majority carriers in the P-channel FET. This means that, with the same physical dimensions, the N-channel FET has higher transconductance than the P-channel FET, which translates to lower drain-source resistance during the ON state, or RDSON.
Typically, the RDSON of the N-channel FET is two to three times lower than that of a similar-sized P-channel FET, thus a higher ID by a similar factor (without considering other constraints such as bonding-wire thickness and packaging). This also means that, for the same RDSON and ID, the N-channel FET typically requires less silicon, and therefore has lower gate capacitance and threshold voltage than the P-channel FET.
In addition, since the VD of the N-channel FET stays below the VG by a factor of VT while the switch is ON, and the VD is typically tied to the VIN, it is possible for a very low VIN to be passed to the load. Theoretically, the VIN of the N-channel FET switch can be as low as close to ground (GND), and up to VG - VT. The P-channel FET switch, on the other hand, passes a VIN (tied to VS) that is always higher than VG + VT to the load.
However, this is not to say that the N-channel FET is a better choice than the P-channel FET as the pass element in every circumstance.
As discussed, one fundamental property of the N-channel FET is that for the switch to operate in the linear region while it is ON, the VG needs to be higher than the VD by a value of VT. However, since the VD is almost always connected to the VIN, which is usually the highest voltage seen by the switch, the VG has to be either "level shifted up" from an existing voltage such as the external enable signal (EN), or "biased up" by a DC offset, which is a separate and new high-voltage rail, typically called VBIAS.
If the gate voltage is level-shifted up from the EN, an additional internal circuit, typically a charge pump, is needed. The charge pump requires an internal oscillator, and at least one "flying" capacitor on the chip to produce a gate voltage, usually a multiple of the EN value during the ON period. This, of course, adds design complexity and silicon, which offsets the silicon reduction gained by the N-channel FET's lower RDSON property. Indeed, when the load current is relatively low (up to several amperes), the charge pump adds more silicon area than the RDSON factor reduces, which makes the N-channel switch a higher-cost and higher-design-complexity solution than the P-channel alternative, see Figure 1 for more details.
If the gate voltage is biased up by the DC offset VBIAS, then the silicon area increase is not major, since the charge pump is no longer required. However, this may not be the optimal solution from a system perspective, as it may not have the extra high voltage rail, which is the case for most of the battery-powered equipment and devices, see Figure 2.
In the case of the P-channel FET, however, the VG is always below the VS (tied to VIN). As long as the VS maintains a value of VT about the VG while the switch is ON, it always operates in the linear region and no special internal circuit or external voltage rail is required. This is accomplished via use of a gate control block to "level shift" the EN down to the right VG level. This option does not require much on circuit implement, or extra silicon area, Figure 3.
Typically, the N-channel high-side load switch is a good choice in high-power systems where extremely low RDSON is required, or low input-voltage systems where VIN that is close to GND needs to be passed to the load. The P-channel high-side load switch, on the other hand, is advantageous in low-power systems where design simplicity is mandatory, or in high input-voltage systems where high VIN needs to be passed to the load. See Table 1 for a summary of key parameters of typical N-channel and P-channel, FET-based switches.
Table 1: Comparisons of N-channel FET and P-channel FET-based switches.
(Click to Enlarge Image)
(You can read Part 2 of this article by clicking here.)
Micrel, Inc., High-Side Power Switches,
About the author
Qi Deng is a senior product-marketing manager for mixed-signal products at
Micrel, Inc, San Jose, CA.