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Maximize high-speed signal integrity with the right choice of cables, layout, and equalizer ICs (Part 1)

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dave alexander
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re: Maximize high-speed signal integrity with the right choice of cables, layout, and equalizer ICs (Part 1)
dave alexander   2/4/2009 2:42:20 PM
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Excellent introduction to signal integrity. Hopefully folks in management positions read this; so that, they realize this new high speed technology comes with new and demanding challenges. The days of tacking on wires no longer work with any amount of reliability.

ram07
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re: Maximize high-speed signal integrity with the right choice of cables, layout, and equalizer ICs (Part 1)
ram07   1/27/2009 10:24:36 PM
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Hello, I am primarily a Software Engg (but studied Hardware during my undergrad days), and interested in learning about Signals/Ingerigy/Modulations for fun! And I must tell you that your column was very well written for someone who has no real-world-experience in H/W. I'd like to thank you for your article and am eagerly waiting for the 2nd part to be pusblished. The thing that I don't understand till date is lumped circuit modelling of tranmission lines. How can a signal trace on say FR4 material exhibit inducatnce and capacitive losses? More strictly speaking - what exactly are thoese losses, and how do they fall under the category of capacitive, inductive. Resistive is something I can easily understand. Is there any book/publication that talks about how engineers/scientists modeled these Tx lines to begin with? Thanks. What about other losses that we cannot even account for in these known categories? My email: Deepslaren@yahoo.com

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