Increasing automotive electronics content in modern automobiles has led to challenges in terms of space and weight. And, while the issue of weight has been improved by rationalizing wire harnesses, the space constraint remains a major concern when it comes to automotive electronic integration.
As a result, for engineers looking to conserve space, the level of potential integration of the semiconductor technology employed is more important than ever. However, the latest technologies can help to rationalize the number of components by replacing them with integrated circuits, and the addition of "smart" capabilities to the IC can further improve integration efficiency.
The key to achieving high levels of integration lies with mixed-signal semiconductor technologies. These technologies allow the development of applications that combine analog and digital components, together with some high-voltage transistors, into a single piece of silicon. Clearly the ability to reduce the number of components on the application board down to a single packaged device offers the potential for significant space savings.
Now, if the semiconductor technology is also able to offer the possibility of embedding a microcontroller, as well as some non-volatile memory (NVM), the integrated component can offer the engineer a route to the smart, local control and management of applications ranging from sensor interface solutions to the actuators needed for the motor drivers that are becoming increasingly commonplace in modern vehicles. Such technology opens up new possibilities in terms of system-on-chip (SoC) components and the availability of devices such as smart sensor interfaces.
As you might imagine, arranging the co-existence of the various components and, in particular, delivering the necessary NVM is not an easy taskand where there is complexity there is also the potential for cost. The trick, therefore, is to deliver the necessary level of integration while ensuring the final IC can still provide a cost-effective alternative to a discrete solution.
To do this it is important to look to the architecture of the application and to estimate the size of each functional block. In most applications, for example, the complex technology of NVM may contribute less than a third of the overall silicon size. For such applications 16 or 32 kbytes of flash memory, together with 8 kbits of EEPROM are more than enough.
It is important to emphasize that the NVM element of the design must not be mixed with other aspects such as the main ECUs (engine control units) or BCUs (body control units). In this way the cost of the technology can be kept as low as possible as two-thirds of the component size will not require the complexity of the NVM technology and the number of costly lithography masks required during semiconductor fabrication can be minimized.
An alternative approach to integrating two technologies on the same piece of silicon is to combine two separate silicon dies based on two different semiconductor technologies in the same package. Some manufacturers, for example, are making use of existing capabilities by bringing two dies from different manufacturing lines together in the same plastic package. The issue here is the assembly process used, which typically comes down to a choice between stacked or side-by-side techniques, both of which have their advantages and drawbacks.
Stacked die techniques, for example, are reliable but there is a penalty in cases of customer field failure: it would be difficult to analyze the failing device as one die would mask the issue and block the analysis. The side-by-side technique on the other hand requires custom pad positioning to inter-bond efficiently between the two chips. With the preferred solution in the majority of applications requiring a standard microcontroller with embedded flash, this interbonding presents significant practical limitations.