The widely applied microcontroller in automotive electronics is heading full-speed at a wall of time and cost. The primary benefit of using microcontrollers (MCUs) has been high level system integration combined with relatively low cost. However, there are hidden costs associated with these devices well beyond the unit price. For example, if the chosen part does not have just the right mix of features, it must be augmented with external logic, software, or other integrated devices.
Further, with rapidly changing end-market requirements far more common in today's automotive sector, MCUs often become quickly unavailable. Many MCUs equipped with specialized features and a fixed number of dedicated interfaces do not fulfill market requirements after a short evaluation period. Consequently, system suppliers are being forced to redesign their hardware and re-write associated software, in some cases even having to change the processor core.
The microcontroller dilemma
Microcontroller manufacturers are faced with the challenge affecting the entire market. A MCU is an application-specific product; thus, for each application a new device with a different set of features is necessary. To serve a broader market with a single core architecture, manufacturers offer MCU families with various members providing a mix of interfaces and functions. In most cases this feature mix does not specifically fit customer requirements, so for large customer opportunities a variant with a new set of interfaces and functions has to be developed around a specific core architecture.
When microcontrollers were implemented in older technologies, with relatively low manufacturing costs, this strategy was successful. Today, with state-of-the-art process technologies used increasingly for higher levels of system integration, developing new microcontroller variants carries a very significant cost. Because only a few customer opportunities offer the necessary volumes, it no longer makes business sense to produce such specialized devices for the requirements of a single customer.
As a result, new microcontroller variants are equipped with more and more features to attract whole markets, migrating to standard products rather than application-specific devices. While this makes them very powerful, of course the product costs rise dramatically and it becomes more difficult to serve cost-sensitive markets, such as automotive electronics.
There is no solution to this dilemma without changing the root cause of the problem, the fixed implementation of functions in silicon. A new design approach is clearly required.
Flexible microcontroller concept
The way out of this dilemma is the implementation of flexible functions in silicon available with FPGAs. These devices offer a powerful, viable alternative to microcontrollers because they significantly reduce engineering development time and the cost of multiple silicon iterations. For example, the development of a flexible graphics system for car radios and navigation devices has been accelerated by six months using an FPGA approach.
Unlike microcontrollers that do not possess required features, FPGAs can be programmed and reprogrammed as needed during the design process, enabling more rapid prototyping and faster time-to-market. The devices can also be upgraded in the field if requirements changeeven after the devices are deployed in a product.
Automotive graphics controller applications are a key application where FPGAs are typically preferred over traditional controllers. While low-cost FPGAs for isolated functions such as graphics are very well accepted in the automotive market, more complex functions would become too expensive in a programmable device because of the huge silicon overhead required for programmability.
But with a seamless migration path from FPGA to structured ASIC now possible, a flexible microcontroller is both cost-effective and able to be specified exactly to customer requirementswith the features selected from a large library of predefined and scalable building blocks.
The main differentiator to traditional microcontrollers is the seamless migration path from the prototype FPGA to the resulting microcontroller. Both the CPU and the bus architecture are unique to the flexible microcontroller concept and can be mapped to the design with the exact functions and features required for a specific customer application.
The CPU used in this Altera concept is a soft RISC processor. However, this processor does not reside, as is usually the case, on an unchangeable piece of pre-specified silicon. Instead, it is automatically generated based on the specifications defined by the system architect/design engineer with the aid of the available tools, and is loaded into the FPGA with the remainder of the logic required for the entire circuit. Thus the processor core can be parameterized using associated development tools based on the requirements for the specific application. Most importantly it can be implemented with exact functionality and corresponding consumption of logic required.
In Altera-based flexible MCU applications, the Nios®II embedded processor uses a standard RISC architecture with separate address buses and data buses, each 32 bits wide. Both buses operate via separate caches and can be continued independently into the bus system. Ultimately, the system architect determines whether to use separate memory for code and data or keep both in shared memory. Many of the functional units that every processor contains are present in Nios II embedded processors, but the settings determine their character. For instance, the hardware multiplier, the barrel shifter, and the hardware divider can be selected as options. The same is true for the instruction and data cache, which can be varied in size or completely excluded.
Traditionally single buses have been used in microcontrollers, where an arbiter monitored the bus as a resource to be distributed. This created a serious disadvantage as the bus, a central resource for the system, quickly became a bottleneck. Consequently, multilayer buses are used in newer systems, particularly for System-on-Chip (SoC) implementations where several buses work in parallel. Bus fabric structures in today's FPGAs work on a similar principle. The difference is, while the number of layers present is static in other multilayer buses, the FPGA bus fabric approach makes it possible to freely select the number of layers required.