With an ever-rising demand for portable and compact electronics, circuit integration has become the key trend in the electronics industry. From the power management standpoint, the frequency compensation circuit is a critical roadblock, since its design is based on off-chip LC filter components . Since the values of these LC filter parameters can vary significantly because of various performance requirements, manufacturer tolerances, and/or parameter drift issues, integration of a fixed compensation circuit implies low bandwidth, in other words, poor load transient response, which is vital in portable applications with fast switching loads like microprocessors, motors, and the like. And in boosting supply applications, because of their special frequency compensation needs (for example, right-half plane (RHP) zero in boost DC-DC converters), the limitations set to enhance LC-filter compliance are even more pronounced. A user-friendly, accurate, fast, highly LC-tolerant supply circuit is therefore in high demand.
Sliding-mode or single-loop sigma-delta (ΣΔ) control mixes the inductor current and output voltage information in a single loop, almost like a current-mode converter, giving stable, widely LC-compliant operation without using a frequency compensation circuit because the inherent current loop makes the inductor look like a current source and the LC complex-conjugate pole effectively disappears. However, for filter LC components potentially varying by orders of magnitude, the power path bandwidth is at its lowest point at the worst-case LC filter combination (i.e., highest L and highest C). As a result, the control path must be low bandwidth, deteriorating the circuit’s ability to respond quickly to transient loads .
A dual-loop ΣΔ technique that controls the inductor current and output voltage using independent ΣΔ loops was reported earlier in . The circuit responded within one clock cycle, which is why it was fast, but the switching of the main loop had to be slower than the internal loop and the slower loop forced the output voltage ripple to be relatively high, in the order of 100 mV. The circuit did achieve wide LC compliance and fast transient response, but at the cost of steady-state accuracy (i.e., higher ripple voltage) and reduced high-load efficiency. A single loop is consequently attractive for steady-state accuracy but unappealing for speed.
A Bypass ΣΔ Approach…
To combine the positive attributes of both single- and dual-loop solutions, a hybrid approach is proposed, whereby a single ΣΔ loop is used for steady-state operation (good steady-state accuracy), bypassing it via a fast-responding ΣΔ path only when the load demands it, during fast transient events, achieving both LC compliance and high effective bandwidth (Figs. 1(a) and (b)). The main loop has high gain and low bandwidth and its function is to achieve high steady-state accuracy under widely variable LC conditions. The bypass path, on the other hand, has low gain and high bandwidth and its function is to respond quickly to fast-moving loads under widely variable LC conditions. This bypass path is threshold-based, set by Q1 in Fig. 1(b), actuating only when the output voltage surpasses passable window limits. The proposed solution is effectively a sliding-mode ΣΔ controller during steady state and a dual-loop ΣΔ controller during fast transient load conditions.
Figure 1a. Proposed accurate, fast, LC compliant boost converter:- block
Figure 1b. Proposed accurate, fast, LC compliant boost converter - circuit level schematics