# Designing a stable DC/DC control loop

Designing the compensation network in a DC/DC converter can be a mystery if one does not know where to place the poles and zeros of the error amplifier and how much gain the error amp needs. Normally, a lot of trial and error is used to try to stabilize the control loop of a DC/DC converter. Here's a systematic approach to getting the job done.

**Overview**

As switching frequencies increase so does the bandwidth of the feedback signal. The feedback signal bandwidth is usually at least one-fifth to one-tenth of the switching frequency. The bandwidth of the feedback signal is determined by measuring the crossover frequency of the open loop transfer function. The frequency where the open-loop transfer function is at unity gain is called the crossover frequency. With switching frequencies in the megahertz region it is not uncommon to have crossover frequencies (f_{co}) of the open-loop gain in the hundreds of kilohertz. Regardless of the operating frequency of a DC/DC converter, the method we'll apply will provide excellent results.

A regulated switching power supply has a controlled output by means of a negative feedback system. A feedback system inherently presents the possibility for oscillation (instability). Any system containing feedback will oscillate under certain conditions. It is essential to know when and under what conditions the system will remain stable.

**Feedback theory**

It is important to know the criteria necessary for a feedback system to remain stable, therefore we need to look at feedback theory to gain some insight. Figure 1 illustrates a system with negative feedback.

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**Figure 1: A system with negative feedback**

The closed loop transfer function is:

When 1 + G(s)H(s) = 0. the system is clearly unstable. Therefore the condition G(s)H(s) ≠ -1 is one criteria for stability. G(s)H(s) = T(s) is called the open-loop transfer function. The magnitude of T(s) is the open-loop gain, sometimes called the loop gain, and T_{θ}(s) is the phase of the open-loop gain or simply the loop phase. Thus when |T(s)| =1 and T_{θ}(s) = -180 degrees, the system is unstable.

The open-loop gain and phase determines the stability of a system. It may seem confusing to call T(s) the open-loop gain when it is a closed-loop system it is describing. We call G(s)H(s) the product of the forward gain and the feedback gain around the loop. When H(s) is non-zero, the system clearly has feedback and therefore describes a closed-loop system.

Another criteria for a stable system is when the magnitude |T(s)| = 1 and the phase T_{θ}(s) ≥ -180.

**DC/DC converter feedback system**

Figure 2 shows the simplified system schematic of a voltage mode synchronous buck DC/C converter such as Micrel's MIC2130/1. The internal transconductance error amplifier is used for compensating the voltage feedback loop by placing a capacitor (C1) in series with a resistor (R1) and another capacitor C2 in parallel from the COMP pin to ground. (Note: Ceramic output caps may require type III compensation and is the subject of a different article). The DC/DC converter is represented as gain blocks in Figure 3.

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**Figure 2: Simplified system schematic**

From feedback theory, one of the criteria for stability is when the open-loop gain T(s) = 1 (i.e., 0db), then the open-loop phase T_{θ}(s)| ≥ -180 degrees, i.e., the phase has to be greater (less negative) than -180 degrees. The amount the phase is greater than -180 degrees is called the phase margin, typically 30 to 60 degrees. Phase margin is a key parameter when predicting the stability of the system and how much overshoot and undershoot the system exhibits during transients.

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**Figure 3: The DC/DC converter, gain-block representation**

The open-loop transfer function, magnitude, and phase is given by:

_{ea}*G

_{PWMcmp}(s)*G

_{PWRS}(s)*G

_{flt}(s)*H

_{fb}(s),

where the magnitude is:

_{ea}(s)| + |G

_{PMWcmp}(s)| + |G

_{PWRS}(s)| + |G

_{flt}(s)| + |H

_{fb}(s)|

and the phase is:

_{θ}(s) = θ

_{ea}+ θ

_{PWMcomp}+ θ

_{flt}+ θ

_{fb}

The gain of the transconductor type error amp in Fig. 3 is given by:

For Micrel's MIC2130 family of controllers, g_{m} = 1.5 millisiemens and

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i.e., with the MIC2130/1 having a maximum duty cycle equal to 85 percent. Further,

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and where:

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For simplicity, we combine the PWM comparator gain and the power stage gain and call it the modulator gain. Therefore:

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(Click on Image to Enlarge)

and where the magnitude of T(s) is |T(s)| = |G_{ea}(s)| + |G_{MOD}(s)| + |G_{flt}(s) + |H_{fb}(s)|. Therefore θ_{MOD} = 0° The phase of the output filter includes the complex poles of the inductor L and the output capacitance C_{OUT}. And at higher frequencies there is a phase boost caused by the zero generated by the equivalent series resistance (ESR) of C_{OUT}. Therefore the filter has 2 poles at *F _{0}* and a zero at

*F*. In addition, θ

_{esr}_{flt}= -180° at

*F*and +90 at

_{0}*F*.

_{esr}
**Steps for designing a stable DC/DC converter**

1. Use a network analyzer to measure and plot the modulator & filter gain, (V_{out}/V_{comp}) = G_{MOD}(s) * G_{flt}(s) in Fig. 2.

2. From the plot, find the gain at the desired crossover frequency, f_{co} (select a frequency that is one-fifth to one-tenth the switching frequency).

3. Given that we know G_{MOD}(s) * G_{flt}(s) and the feedback gain H(s), determine the required gain of the transconductance error amp (Eq. 2) so that the open-loop gain at f_{co} is 0 dB. Thus

_{co})| = 0 = |G

_{ea}(2πf

_{co}) | + |G

_{MOD}(2πf

_{co})| + |G

_{flt}(2πf

_{co})| + |H

_{fb}(2πf

_{co})|

_{ea}(2πf

_{co}) | = – |G

_{MOD}(2πf

_{co})| – |G

_{flt}(2πf

_{co})| – |H

_{fb}(2πf

_{co})|

4. Design the error amp with enough gain so that the open-loop gain is 0 dB at f

_{co}.

5. Locate the poles and zero of the error amp for the desired phase margin.

**Design example**

Let's consider the MIC2130 family of controllers as an example, with:
V_{in} = 24; V_{out} = 3.3; I_{out} = 10 amps; L = 7.3 microhenries, C = 670 microfarads; R_{esr} = 40 milliohms; F_{sw} = 150 kHz. The gain and phase of the modulator and filter is V_{out}/V_{comp} = G_{MOD}(s) * G_{flt}(s) (see block diagram of Fig. 2). A computer generated output of V_{out}(s)/V_{comp}(s) is shown in Figure 4.

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**Figure 4: Modulator phase and gain**