(Editor's Note: To see a linked list of all entries in this series, click here.)

In Power Tip #3, we discussed how the source impedance of an input filter can turn resistive, and how it can interact with the negative input impedance of a switching regulator. At worst case, these impedances can be equal in magnitude, but opposite in sign to make an oscillator. A general criterion has been established that the source impedance of an input filter should be at least 6dB less than the input impedance of a switching regulator as a safety margin to minimize the chance for oscillation.

The design of an input filter usually begins with selection of an input capacitor (CO of Figure 1) based on ripple current rating or hold-up requirements. The next step usually involves selecting an inductor (LO) based on the system's EMI requirements. As we saw last month, near resonance the source impedance of these two elements can be quite high, leading to an unstable system. Figure 1 presents a method to control this impedance by placing a series resistor (RD) and capacitor (CD) in parallel with the input filter. The filter could be damped with just a resistor across CO. However, in most cases the power loss would be unacceptable. An alternative method is to add a series connection of an inductor and resistor across the filter inductor.

Figure 1: CD and RD damp the output filter source impedance.
(Click this image to view a larger, more detailed version)

Interesting. I believe there are three basic topologies that dampen the input filter. This extra capacitor has the disadvantage that for instant connection of a high input voltage, the resistor needs to absorb 0.5CU^2. I experienced this as a problem. Another solution, used by computer products is a LC-series combination in parallel with LO. The math behind it is the same. The theme has been discussed since the eighties. I remember three articles. Only one of them uses the calculation of pole location to find an optimum. This should also work for two stage input filters. I could not see in the article presented here wether or not the NEGATIVE input impedance has been used in calculating the frequency spectrum. The second chart I find very interesting, but I wonder what kind of mathematical model has been used to derive it. Is this 50% approach a rule of a thumb thing or does it give the optimum ? Apart from the optimum value of R, there are also a minimum and a maximum value beyond which there are no stable solutions for C.

David Patterson, known for his pioneering research that led to RAID, clusters and more, is part of a team at UC Berkeley that recently made its RISC-V processor architecture an open source hardware offering. We talk with Patterson and one of his colleagues behind the effort about the opportunities they see, what new kinds of designs they hope to enable and what it means for today’s commercial processor giants such as Intel, ARM and Imagination Technologies.

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