3. HDMI Tx DDC/CEC line test
It is important to correctly connect the Consumer Electronics Control (CEC) line (Pin 13 of the HDMI connector). If the system is not designed to support the CEC function, designers can leave the line floating. People sometimes want to connect the CEC line to a general-purpose I/O of the video signal processing (VSP) chip to allow for possible extension later. Designers must then make sure the connection meets the HDMI CT criteria, including keeping the maximum DDC line capacitance under 100pF.
4. Required video format support of HDMI source devices
HDMI Specification requires that all HDMI sources must support one of the following formats: email@example.com/60Hz, firstname.lastname@example.org/60Hz?¼or 720576p@50Hz. Another requirement when designing HDMI sources that is sometimes overlooked: if any YPbPr or other non-compressed digital ports on the source device can support the following formats, then the HDMI ports on the same source device must also support them
5. Compatibility between HDMI source (HDMI Tx) and DVI sink (DVI Rx)
The HDMI Specification requires that all HDMI sources be compatible with the sink devices, which are compatible with DVI 1.0. When an HDMI source is connected to a DVI sink it must meet the following requirements:
The video formats transmitted are RGB
No Video Guard Bands are transmitted
No Data Islands are transmitted
When a source device detects the plug-in of a sink, it shall assume the sink is a DVI device. In the mean time, the source will check if the EDID of the sink contains CEA extension and if the CEA extension contains VSDB (Vendor-Specific Data Block) with valid length. If both are true, then the source will determine that the sink plugged in is an HDMI device.
6. EDID test of HDMI receiver (Rx)
The failure rate for this test was quite high. As such, designers should familiarize themselves with the EDID requirement of the most updated HDMI specifications. Listed below are some common mistakes that cause failure:
I. In the first 128 bytes of EDID, the "Monitor Range Limit Header" and "Monitor Name Header" must be provided. Both are 18 bytes. If the content of either one of these is shorter than 18 bytes, then it must be filled by 0x20 and finished by 0xA0.
II. Inconsistency of supported video formats between "Short Video Descriptor" (SVD) in EDID and "Capabilities Declaration Form" (CDF). Any formats declared in the CDF must also be listed in the SVD of EDID.
To simplify the system design, some designers connected the +5V voltage of the HDMI input directly to the HPD pin of HDMI Rx through a 1K resistor. In such designs, the EDID EEPROM can not be read and the HPD pin voltage could remain high when the system is put into standby mode or when the ac power is removed, This causes the failure of HDMI CT, because the HDMI Compliance Test Specification requires that the EDID must be accessible and can be read when the HPD pin voltage is high, even when the ac power is removed or the system is put into standby mode. A sample reference design circuit, included in a later section, addresses this issue.
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