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Video encoding with low-cost FPGAs for multi-channel H.264 surveillance

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re: Video encoding with low-cost FPGAs for multi-channel H.264 surveillance
aswakle   1/1/2009 1:10:21 PM
Figure 5 shows system encoding 1080p video at 20 FPS. I understand that the system implements data-parallelism whereby the two H264 encoder cores operate on different (successive) frames. However each core will require reference frame (generally the previous one) for ME and MC. If these cores are getting alternate frames, then their perception of reference frames is different and therefore the decoder may have an issue. This, of course, can be solved by using the "multiple reference picture" tool in H.264, whereby (n-2)th reference frame may be used by the encoder. So though the H.264 encoder core operates to use the successive frames, the decoder is informed that (N-2)nd reference frame is being used. And then there would be no issue. Would that be correct interpretation ? Thanks, Abhijeet Wakle

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