As service providers strive to meet growing government demands for "green" compliance, as well as their own financial desire to reduce operating expenses, the problem of heat dissipation has developed into a hot-button issue amongst the semiconductor industry in addressing these concerns. Heat dissipation, which must be approached from both the component and system architecture standpoint, is a recurring issue that both OEMs and silicon vendors have attempted to find solutions for throughout the years. While silicon vendors are constantly looking at new technologies designed to reduce power (and thus heat) OEMs are constantly evaluating new air-flow approaches and various component cooling approaches.
Regardless of the solutions, anyone who has spent time around a central office has their own story of the "hot component" ranging from a simple capacitor to power-hungry CPUs. In most infrastructure "big iron," there are one or more offending components. Whatever the offending component or influencing factor -- be it the final design which includes noise levels in the central office; the cost of the cooling design; or the amount of air conditioning -- there are some basic options which are available to the semiconductor industry as a whole to manage heat dissipation.
Managing heat dissipation
The energy conscious semiconductor industry is considering many alternate process nodes in order to lower power including developing specific lower power process nodes. In the past, a common approach to reducing chip-level power was the move to smaller and smaller process nodes. A silicon process node is the stepping stone used to represent the size of each technology level. It is represented by the size of the smallest transistor element and is measured in nanometers (nm) or billionths of a meter. Integrated circuit manufactures need to make transistors smaller and smaller so that the chips run faster, and to get more transistors on each chip to increase functionality. Historically, moving to a smaller process node often cut power consumption in half while doubling performance.
However, once the semiconductor industry moved to the 90nm process node, this progression slowed. The primary reason was the concept known as "leakage". Leakage occurs when a current leaks through transistors into the surrounding chip as a path to ground. This power is wasted and thus reduces the expected performance gains of smaller process nodes. Smaller process nodes have higher leakage because the insulating elements of the transistors are thinner and less effective. As a result, majority of the heat generated is from this "leakage" of power.
In order to reduce this "leakage," the alternate process nodes that are being developed by the industry must also take into account the following: package characteristics, direct coupling techniques, and dumping more power to the PCB (versus through the package top) are areas that can be considered.