Breaking News
Design How-To

Xilinx Virtex-5 User-Guide Lite

2/13/2008 05:00 PM EST
5 comments
NO RATINGS
1 saves
Page 1 / 3 Next >
More Related Links
View Comments: Newest First | Oldest First | Threaded View
jack12345
User Rank
Rookie
re: Xilinx Virtex-5 User-Guide Lite
jack12345   9/30/2010 4:41:42 AM
NO RATINGS
The article says about the implementation of 16:1 mux in a slice that contains 4 LUTs and 2:1muxs.In such a case the implementation is possible.

jack12345
User Rank
Rookie
re: Xilinx Virtex-5 User-Guide Lite
jack12345   9/30/2010 4:37:48 AM
NO RATINGS
wdvga

baburavi
User Rank
Rookie
re: Xilinx Virtex-5 User-Guide Lite
baburavi   12/21/2009 11:39:17 AM
NO RATINGS
I think there is a small mistake in page no:1 about the capability of 6-input LUT. It cannot implement 16:1 mux, the max can be 4:1 mux (4 bits as inputs and 2 bits as select lines). Correct me if I am wrong.

Salamo
User Rank
Rookie
re: Xilinx Virtex-5 User-Guide Lite
Salamo   2/14/2008 8:57:28 AM
NO RATINGS
This is a nice compact article about Virtex-5 FPGAs. It has the core facts in a very comprehensive way and you get a fast entry to the Virtex-5 technology and concepts. Very nice and usable!

volkerkamp
User Rank
Rookie
re: Xilinx Virtex-5 User-Guide Lite
volkerkamp   2/14/2008 8:25:49 AM
NO RATINGS
Great Article! If anyone needs help with slave serial configuration from a CPU, look here: http://www.kamptec.com/blog/doku.php?id=hardware:xilinx-bin2h

Flash Poll
Radio
LATEST ARCHIVED BROADCAST
Join our online Radio Show on Friday 11th July starting at 2:00pm Eastern, when EETimes editor of all things fun and interesting, Max Maxfield, and embedded systems expert, Jack Ganssle, will debate as to just what is, and is not, and embedded system.
Like Us on Facebook

Datasheets.com Parts Search

185 million searchable parts
(please enter a part number or hit search to begin)
EE Times on Twitter
EE Times Twitter Feed
Top Comments of the Week