You may be surprised to learn that programmable logic use in handsets has been increasing over the past ten years. This long history of use in handsets may not be common knowledge, but its effect on the programmable logic industry is clearly visible. Every major programmable logic vendor now has some form of low-power offering targeting the space. In addition, for the first time in two decades, a completely new FPGA company has been formed for the sole purpose of servicing low-power programmable logic users. How did PLDs find their way into handsets? In the late '90s, programmable logic was used in the several PDA designs. Use continued as PDAs morphed first into PDA phones and later into smartphones. Today, programmable logic can be found not only in high-end smartphones, but in many mainstream handsets as well.
Since it is widely recognized that handsets have very difficult product constraints and rapidly evolving market conditions, a logical question is why would someone design programmable logic into this type of price-sensitive, high-volume consumer product? The answer to this question is found in the handset designer's environment and challenges.
Convergence, ambiguity, and short product development cycles dominate the environment
Over the past ten years, handsets have experienced extreme levels of convergence. Is the device primarily a phone, a PDA, a camera, an MP3 player, a GPS unit, an email conduit, or an Internet browser?
This list grows daily. The process of merging all of these functions, into products that can work within the disparate phone standards of multiple countries is full of ambiguity. In addition, handset designers have little time. Ranging from six months in the fast moving Asian countries, to twenty four months in North America, handsets experience some of the shortest life cycles of any consumer electronic products.
These short product life cycles translate into short product development cycles for handset designers.
Handset designer's challenges
In order to create the maximum number of features, in the shortest period of time, with the least amount of product costs, handset designers rely on ASSP chipsets, i.e., build your design around the least number of components, write the necessary software, encapsulate it in plastic, add the logo, and ship it. However, these off-the-shelf chipsets are readily available to multiple competing companies and if everyone uses the same chipsets, soon all products begin to look alike.
At this point, companies are forced to differentiate on price--not an enviable strategy. So the handset designer's challenge is how to build differentiated products, yet take advantage of the rapid, inexpensive feature integration offered by chipsets.
In the midst of this environment, handset designers have discovered that they can use programmable logic to quickly customize a standard chipset. One early example of this is found in the development of camera phones. In fact, one of the first uses of programmable logic in a high volume handset occurred in a Korean camera phone. The handset design team selected a readily available camera chip for their phone, but quickly discovered it wasn't designed to work with their baseband chip. As a result, they needed to correct data and timing incompatibility. Initially, they did this using discrete components but the components selected wouldn't fit on the space-constrained PCB. Then someone remembered using a PLD in college. They found a low-power CPLD, put their design into it and brought to market one of the world's first camera phones. Camera phones caught on and this function was absorbed into almost every baseband chip, so PLDs are no longer needed for this particular feature.
At this point, a valid question is, instead of using programmable logic, why not just build an ASIC? If time permits, this might be feasible. However, if the product life cycle is 18 months and the development cycle is three or four months or six at the most, then trying to spin an ASIC becomes difficult. A further challenge for ASIC development is that the features may not be well defined, e.g., interfacing two devices not meant to work together. This creates a situation that is not conducive to effective ASIC development; a rushed schedule, combined with a lot of ambiguity is a sure way to end up with an ASIC that doesn't work.
How is Programmable Logic used in handsets?
There are numerous applications for programmable logic in handsets. For the purpose of this article, these applications are grouped into three categories: port enhancement, interfaces and controllers, and power saving coprocessors.
Port enhancement, often referred to as glue logic, represents some of the earliest uses of programmable logic in handsets. Three common examples are voltage level translation, GPIO pin expansion and solving I/O compatibilities.
Most PLD I/O is arranged in groups (banks), each having its own voltage reference, making voltage level translation simple. Designers have discovered that one PLD economically replaces several discreet voltage level translator devices. Often an Application Processor doesn't have enough GPIO pins. Designers can solve this by attaching a PLD as a slave to an existing SPI or I 2C port. Then the Application Processor can read/write to a register in the PLD, which is connected to I/O. In this way, the Application Processor uses one of its existing ports to gain access to dozens of registered I/O. Examples of using a PLD to solve I/O incompatibilities include serial-to-parallel conversion, making an I2C port talk to an I2S or SPI port, and overcoming format or timing incompatibilities.
Interfaces and Controllers
Up until very recently, only small CPLDs have been able to meet power consumption and small-size requirements of handsets. Therefore handset designers have been limited to simple port enhancement applications. However, a new generation of low-power FPGAs has been introduced. These offer considerably more resources, allowing designers to create interfaces and controllers, which require significantly more horsepower than has been available in small low-power CPLDs. Given that a small CPLD might be able to convert from one interface to another, e.g., SPI to I2C, in contrast, a low-power FPGA cannot only do the conversion, but could also be used for expansion, e.g., use one SPI port to create multiple I2C ports. Similarly, whereas a traditional CPLD might be able to do LCD timing control, a low-power FPGA can implement a complete touch screen LCD controller.
Power Saving Co-processors, or There's No Such Thing As Too Much Power Savings
Designers are discovering that even though the application processor can do almost everything, they may not necessarily be the best solution. The reasons include power consumption and battery life. For instance, using the MP3 capability in a phone can shorten battery life to as little as two hours. And enabling the GPS can drain a battery in as little as thirty minutes. That can really limit the radius of travel. In the MP3 example, one of the reasons for such poor battery life is that the application processor is being used to send converted audio data to the DAC/headphones, for the entire length of the song. In contrast, a low-power FPGA could be combined with a cellular RAM to form a buffer used to send the converted audio data to the DAC. In this case, the application processor is kept in deep sleep mode during most of the length of the song. There are many variations on this theme of using a low power FPGA to offload a task from the main processor to achieve significant power savings--but that's a whole other article.
The future--more, not less
What is happening with handset designers is similar to what happened with communications designers. Once communications designers started using programmable logic, they wanted more of it, not less. As a greater number of handset designers become "hooked" on programmable logic, PLD suppliers will respond with bigger, better devices. And, just as programmable logic has become a staple in routers, switches and hubs, so too will programmable logic become entrenched in handsets.
Platform design flexibility
One key to widespread adoption of programmable logic in handsets is something referred to as platform design advantage. This means allowing many designs to result from a single original implementation--design once, make many. For example, once a designer uses programmable logic to implement one specific peripheral controller in a product, that same design can be reused multiple times. In one project, the designer may reuse the application processor interface with a new peripheral. In another, the designer might make slight modifications to the processor interface to allow a peripheral (or memory, or display) designed for one product, to quickly be adapted to another. The design once, make many platform flexibility of FPGAs allows design teams to spin multiple versions within a family having differing peripheral combinations, varying feature sets and price points for a range of competitive offerings. This is especially valuable in the handset market where short development cycles often preclude the use of ASICs.