FPGAs continue to march to the tune of Moore's Law with new devices appearing at approximately 2-year intervals. Today, 65 nm FPGAs are available with capacities equivalent to 2M ASIC gates. At these high capacities, and correspondingly high IO counts, 65 nm FPGAs are effective ASIC prototyping vehicles. Based on interaction with customers and our own surveys of ASIC designers, we estimate that over 90 percent of SoCs and ASICs are being prototyped with FPGAs, and the demand for off-the-shelf ASIC prototyping solutions is growing at double-digit rates. So, what's driving the enthusiasm for ASIC prototyping?
The ever-increasing costs of leading-edge ASICs and SoCs are driving semiconductor vendors to seek higher returns on their investment by finding ways for each device to serve broader markets. The increased use of software within these devices provides an effective mechanism to do so. Indeed, increased software content equates to more features, and software variations offer market-specific product differentiation. As a result of this trend to increase software content, it's not uncommon to find a million lines of software code in an ASIC or SoC. Furthermore, the growing use of multi-cores, as forecast by market research firm Gary Smith EDA, will compound the already tremendous growth in software content. This rapid growth of on-chip software is generating new SoC design verification challenges and FPGA-based ASIC prototyping is providing the solutions.
But, the dramatic increase in software complexity dictates that software development must start much earlier in the design cycle if a company wants to hit its time-to-market goals. Because software complexity is so high for new applications, development can take upwards of 18 months, so companies need to start software development well in advance of the chip roll-out date. Waiting until after first silicon is available is no longer an option and only will lengthen the development cycle.
FPGA-based prototypes are an ideal software development platform for several reasons. First, FPGA prototypes can run software at least 10X faster than alternative verification methodologies such as emulation. While other verification alternatives have a place in the overall development flow, only FPGA-based prototypes run fast enough to exercise very complex software applications and operating systems. Optimal system integration and software testing requires speeds above 10 MHz (50, or even 100 MHz would be better). Prototypes can achieve these speeds, which is a major reason why their use continues to rise.
Cost is another key reason for the extensive prototype use we see today. FPGA-based prototypes are not only affordable; they easily are deployable and can be distributed widely to various members of a software development team. And, with state-of-the-art SoCs, it's not unusual to have a team of 100 to 200 software developers involved worldwide. Thus, the software development team, regardless of location, can be up and running months earlier than is practical with other approaches, shortening development times, further reducing costs.
Finally, FPGA-based prototypes improve RTL quality as well. Integrating software with hardware is an arduous process, normally done after the hardware design has been thoroughly tested and is deemed free of bugs. Yet, inevitably, even after extensive verification, a few hard-to-find bugs are revealed late in the game when software and hardware come together. These final hardware bugs, buried deep in the system, are not easy to detect with slow verification methods because they are only revealed with extremely long and time-consuming test sequences. The superior speed of FPGA prototypes shortens the test sequence time, and provides another advantage to this approach. Until recently, analyzing bugs in a running prototype was quite difficult. However, Synplicity's new TotalRecall full-visibility technology substantially simplifies analysis by automatically capturing test benches for hard-to-find bugs so they can be replayed in a simulator.
Even with all the benefits offered by FPGA prototyping, there still remain many ways to improve the user experience. Verification with FPGA prototypes must be cleanly integrated with other methods of verification. Synplicity has taken the first step in this direction by integrating prototype debug with RTL simulation through its TotalRecall technology. Other opportunities for integration exist. For example, Synplicity and Synopsys recently announced a joint marketing agreement to create next-generation hardware-assisted verification flows. By working together, we expect to be able to deliver solutions that increase productivity for FPGA-based prototyping of ASIC designs. In addition, much can be done to make prototypes faster to develop and easier to change and modify. Accomplishing this task requires the availability of more complete solutions.
Until now, design teams interested in ASIC prototyping had to buy products from a variety of vendors and integrate them. Synplicity has taken an important step to solve this problem through its acquisition of HARDI Electronics AB. HARDI's HAPS (High-performance ASIC Prototyping System) solutions offer off-the-shelf prototyping hardware with the latest FPGA technology that is flexible, extensible and reusable. By combining software and hardware in a single solution, Synplicity will be able to improve the prototyping experience by offering easier-to-use, easier-to-bring-up solutions.
The ultimate goal is to create an environment where designers can get to work quickly, debug rapidly and make changes without delay. With the advent of integrated prototyping systems, prototyping will assume a key position along side other verification methodologies. The ability to run "at speed," i.e. running tests as fast as the hardware will go, will be an indispensable part of the verification of software-intensive SoCs. Only then will designers be well equipped to deal with the emerging challenges associated with increasing device and software complexity.
About the Author:
Andrew Haynes is Vice President of Marketing for Synplicity.