While the Penn State Philips (PSP) transistor model is rightly hailed as an excellent alternative to traditional BSIM models for RFIC design, RF designers need to be aware of how PSP models relate to actual device behavior. PSP models do require some judgment on the part of model developers. Equally important is an understanding of the way these models are used in an RF process design kit (PDK). Simply including PSP models in a PDK does not guarantee that designers get all of the advantages in simulation accuracy and efficiency promised by the improved modeling technique. Today's RF PDKs must support the models appropriately and also provide capabilities such as statistical evaluations and an effective inductance tool.
Because high-quality transistor models are crucial for predicting circuit performance and design margins--and thus minimizing silicon iterations--this white paper explains the technology behind PSP models and why their accuracy depends to some extent on how PDK developers implement the models. Additionally this paper shows how statistical evaluations can further help designers deal with the inherent variability of deep-submicron fabrication technologies.
These and other capabilities offer better RF simulation accuracy than ever before, despite the greater demands of advanced process technologies. RF designers can get this higher accuracy with less effort and therefore focus on improving circuit functionality while meeting tight constraints on power consumption and noise.
About the author: Ivan CheeHong Lai has served with Fujitsu Japan as an engineer for the past two years, after working with Motorola in Singapore and Hewlett Packard Corporation in France. He has a Ph.D. from the University of Tokyo and has authored more than 25 technical papers in journals and conferences during his association with the electronics industry.
This article is presented in two parts:
Part 1: click here
Part 2: to be posted April 30, 2009