For triggering, users can specify serial protocol conditions to trigger on. For example, set the scope to trigger on a USB CRC error, or when the I2C address equals 1F HEX, or when the character A is seen on the receive line of a UART. Inside of the oscilloscope, the circuitry is designed to recognize serial patterns and trigger on specified protocol conditions. This makes protocol triggering easy. An example of serial triggering for I2C is shown in figure 1.
Fig 1: Each serial standard has a set of pre-defined protocol specific conditions that a user can quickly customize. In this example, a sample I2C triggering conditions is shown on Agilent's Infiniium 9000 Series oscilloscope.
Oscilloscope vendors use either hardware or software technology to convert the captured serial link into decoded protocol content as shown in figure 2 for I2C. Protocol can be shown at the physical level using symbols adjacent to waveform, or in a lister or protocol viewer. DSOs offer protocol decode on scope channels while MSOs provide protocol decode using either the scope or digital channels, or a combination of the two. Oscilloscopes determine what is a 1 versus a 0 by referencing the voltage value of the signal at a particular clock for each scope channel, or in the case of MSOs, the digital channel threshold setting is used. For serial buses with embedded clocks such as USB and PCIe, scope circuitry provides clock recovery in order for proper protocol analysis.
Fig 2: Enabled with a serial application package, Agilent's 9000 Series oscilloscope will convert captured scope or digital waveforms into protocol decode in real-time. In this I2C example, the scope highlights a 7-bit start to address 50H with data value of 10 4D 53 4F. Performing this manually for a single capture is time consuming and error prone. Manually calculating in real-time is impossible. To see a bigger version of this graphic click here.
High-speed serial bus testing
Most newer FPGAs have high-speed serial ports that support multi-gigabit speed. Design teams can implement these to rapidly pass data between chips or from an FPGA to a backplane or IO. If interacting with a standard IO interface like PCIe or USB, design teams will want to investigate oscilloscope compliance software that rapidly tests compliancy to an industry standard to ensure compatibility. Compliancy tests are formulated by industry standard bodies and then each scope vendor must prove formal conformance to the testing. This ensures that scope users who purchase compliance software have complete confidence in the tools being used.
If the high speed bus is embedded, protocol analysis scope capability makes an excellent choice. These application packages provide protocol-level triggering and decode. For the user whose scope is home base for debugging, this extends the scope capability to isolate faults that may be only seen at the protocol level, but whose cause is due to a physical layer issue such as crosstalk or other signal integrity problem.