The standards based system/peripheral card-on-backplane architecture is well accepted in the embedded computing industry. The first industry standard for system/peripheral card-on-backplane was PICMG 1.0, which supports a PCI/ISA interface from board to backplane. The establishment of this standard provided a stable and efficient environment for manufacturers to simplify design efforts, minimize costs, allow interoperability of products from different vendors, and stimulate new product development. The main advantages of the card-on-backplane architecture are faster mean time to repair (MTTR) over conventional motherboard designs, flexible backplane slot configurations, and the ability to use a broad range of off-the-shelf peripheral cards.
The PICMG 1.3 specification is the latest evolution in PICMG 1.x system designs, and addresses the need for faster system platforms with high bandwidth interfaces to peripheral cards. Flexible system design and PCI/PCI-X compatibility of the older specifications have been preserved with PICMG 1.3, but the ISA bus has been replaced by point-to-point PCI Express serial links, advanced features such as IPMI, Serial ATA, USB, and Ethernet connections, and additional power pins via the edge connectors. The PICMG 1.3 specification allows users to take maximum advantage of the latest chipset functionalities, provides increased bandwidth capability, and allows flexible and simplified system design.
System Host board
The PICMG 1.3 System Host Board (SHB) specifications are referred to as SHB Express. An SHB interconnects with the backplane and has multiple PCI Express links that can operate at x1, x4, x8, or x16 depending on the capabilities of both the SHB and the backplane. The SHB's PCI Express links are via the edge connectors A and B (see figure 1). A total of 20 PCI Express lanes are supported, and can be configured as x16, x8, x4 and x1 links in various combinations. PCI and PCI-X links can be provided using PCI Express-to-PCI/PCI-X bridge chips on the backplane, or using a 32-bit PCI connection via the optional connector D, allowing support of passive backplanes.
The SHB Express specification also features optional I/O interfaces via connector C for SATA (2x), LAN (2x), and USB (4x). All power can be delivered through the SHB's edge connectors A, B and C (500W). Other optional signals supported are ATX/BTX power signals, IPMB, SMBus, JTAG, Geographic Addressing, and PCI wake up. The SHB Express specification defines both full-size & half-size boards with the same dimension as those of the PICMG 1.0 specification, thus minimizing or eliminating chassis redesign costs.
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Fig 1: PICMG 1.3 Full-size SHB dimensions and connector locations