JTAG (jay-tag) is one of the engineering acronyms that has been transformed into a noun, although arguably it is not so popular as RAM, or CPU. IEEE Std 1149.1-1990 IEEE Standard Test Access Port and Boundary-Scan Architecture is the official name, but JTAG is a bit snappier and is an abbreviation of Joint Test Action Group.
If you examine the standard's title you may be able to deduce the two use cases for JTAG devices and hardware. This paper deals with using the Test Access Port (TAP) as a means to control the execution of the processor, and to debug software via the TAP.
Not content with JTAG or IEE1149.1 as a name for this feature, most semiconductor vendors have also declared their own brand name version. To help a user migrate to IA32, this white paper gives a quick overview of the various implementations, and names, of JTAG debug methods for users familiar with PowerPC, ARM and MIPS processors and this is compared to the JTAG implementation in the Intel® Atom™ Microprocessor.
ONCE, BDM, OCD, NEXUS, XDP, are essentially different vendor names or trademark names for the same thing, JTAG, which itself is arguably an abbreviation that means different things to different people. When asked to describe JTAG, depending on your viewpoint and hardware/software experience, you will likely come up with a list that includes:
• An implementation of IEEE 1149.x for Board Test, or Boundary Scan testing.
• An appliance used to program on board flash or eeprom devices on a circuit board.
• A hardware device used to debug microprocessor software.
• A hardware device used to test a board using Boundary Scan.
All of the above are "correct", and can be mapped fairly well to the IEEE 1149.x standard. For the purposes of this paper, however we can exclude the Boundary Scan use cases, and concentrate on the use of JTAG for software debug.
In the general sense, on-chip debugging is a combination of hardware and software, both on and off the chip. The part that resides on the chip is implemented in various ways, and for the purpose of this paper it will be referenced as On-Chip-Debug (OCD). The part that resides off chip is often referred to as an In-Circuit-Emulator (ICE), or, for this paper, as a JTAG Adapter.
JTAG Adapters are in effect, PC peripherals, and need a Linux or Windows-based PC to control them, and to present a user interface. Figure 1 shows a typical development system setup.
Figure 1. A Complete DeBug Solution Consisting of Three Distinct Components