Multicore computing is one of those course-changing technologies - think TV dinners or the phone message machine - proliferating across the range of embedded platforms and permanently changing the face of embedded design.
With new levels of energy-efficient performance enabled by advanced parallel processing and next-generation hafnium-based 45nm technology, many designers are embracing multicore even as they are still learning how to evolve their designs to take full advantage of its benefits.
Meanwhile, its prime benefit of providing more for less is not lost on anyone. More performance per watt, more functionality for less dollar and less physical space are all design tenets that represent ideal design evolution for embedded solutions in every imaginable market or application.
With the development of multicore, applications using the ETX standard made a seamless jump in performance by shifting from one core to two. The COM Express platform was in fact developed in tandem with the advent of multicore; its primary purpose in embedded design is to provide a means to take advantage of the additional multicore capabilities that there was just not enough pin space for with ETX.
Features such as SATA, PCI Express and increased graphics processing are all great examples of the benefits brought to use in COM Express by way of its multicore foundation. Probably the most visible transition to multicore is in motherboards, where designers are embracing multicore's 'more for less' foundation and its impact on functionality, performance and power management.
Multicore in a Nutshell
Multicore processor architectures simply place two or more processor-based "execution cores" within a single physical processor. This in turn connects directly into a single processor socket " however the operating system senses each of these execution cores as a discrete logical processor, each with all the associated execution resources.
More work can be completed in a single clock cycle, because the chip's internal architecture shares the computational work of a single microprocessor between multiple execution cores.
Controls that once called for separate dedicated systems can be integrated into one system allowing a single computer to handle both control and visualization tasks even for complex and highly demanding real-time applications.
Even though there are many options in the realm of multicore processors, not all offer the same level of computing performance and power-efficiency. In order to achieve the full potential of multicore's capabilities, a number of key system-level features must also be part of the design. Intel's platform approach addresses this, combining a multicore architecture with complementary system-enhancing technologies including thread-level parallelism, hyper-threading technology and virtualization.
Both the operating system and the applications running on the computing platform must support thread-level parallelism, in order to take full advantage of multicore processing performance.
A processor equipped with thread-level parallelism can execute completely separate threads of code, for example one thread running from an application, a second thread running from an operating system, or parallel threads running from within a single application.
Multicore architectures incorporate hyper-threading (HT) technology to enable processors to execute tasks in parallel by weaving together multiple "threads" in a single-core processor.
With HT technology, one dual-core processor can simultaneously run four software threads, and as more processors are added to a server, the number of supported threads increases to improve overall computing performance.
With virtualization technology (VT), multiple operating systems and applications run as "virtual machines" in independent partitions on one platform with simple hardware administration.
Overall system stability is improved because processes that would typically compete on single-core systems can be separated and assigned (and/or scheduled), even while the system is in use.
Stand-alone systems such as controllers, firewalls, and data servers can be integrated yet completely isolated from each other within a single system. Multicore and VT combined offer a broad range of configurations resulting in greater freedom for designers to implement multiple applications on one system and significantly reduce hardware requirements,
45nm and Beyond
Intel's 45nm high-k metal gate silicon technology further increases speed and energy-efficiency of multicore architectures. Compared to 65nm technology, Intel's hafnium-based 45nm hi-k silicon process technology offers roughly twice the transistor density, resulting in more than a 20 percent improvement in transistor switching speed, and more than ten-fold reduction in transistor gate leakage.
Recently introduced 45nm Intel Atom Z5xx series processors provide robust performance per-watt in an ultra-small 13x14 mm package. These processors are validated with the Intel System Controller Hub (SCH) US15W, which integrates a graphics memory controller hub (Intel GMA 500), and I/O controller hub into one small 22x22 mm package.
According to Intel, the two-chip platform provides more than 80 percent reduction in total footprint over the previous-generation three-chip solution, with a combined thermal design power under 5 watts.
45nm production represents Intel's fastest product ramp to date, and includes single core Intel Atom processors, dual core Intel Core 2 Duo processors, Intel Core i7 processors with four cores, and the 6 core Intel Xeon processor.
In keeping with Intel's tick-tock model of production and development, and drawing on both the significance and the proven silicon processes of 45nm, Intel's next microarchitecture is coming soon, 32nm multicore process technology with second generation high-k + metal gate transistors will increase performance across single and multithread usages (vs. today's Intel Core 2 Duo product family), and will enable processors with six cores supporting 12 threads (on the desktop roadmap).
The embedded space has traditionally followed the desktop space. As such, like advances can be expected for use in embedded applications before too long. Core size of the processor will be smaller, and its multi-chip package will include integrated graphics.
The equivalent oxide thickness of 32nm's high-k dielectric has been reduced from 1.0nm on 45nm to 0.9nm, while gate length as been reduced to 30nm. Transistor gate pitch continues to scale 0.7x every two years and 32nm will represent the tightest gate pitch in the industry.
According to Intel, these improvements are critical for scaling down the size of ICs and increasing transistor performance. 32nm process technology with second generation high-k + metal gate transistors will enable designers to make simultaneous design improvements in both size and performance.
The Multicore Movement
Only a few years ago, a single core CPU was satisfactory in many instances. Today " with performance demands than include greater background tasks, advanced security features and more advanced GUIs " designers are commonly using multicore solutions in mid-range designs. Performance increases are expected, and it's a big part of the designer's job to build products that do more, look better and offer more secure processes.
Where early multicore processors were the monsters of the high-end, today they represent mid-range solutions. With power consumption frequently the most influencing factor, embedded communities can expect multicore to penetrate down to even the lowest level applications.
Leading-edge applications such as image processing will continue to do their part to fuel the movement, demanding higher compute power, higher bandwidth, faster CPUs and high memory throughput with or without memory cards.
So what's next for multicore? How about just more? More cores, more performance, more options. Expect more of this 'more for less' concept, with sheer performance enhancement requirements. That and increased functionality that impacts exactly what an end-use application can achieve.
Greater security features such as Trusted Platform Management (TPM) are gaining importance in network-centric applications. Improved graphics are piece of the puzzle as well, and require more readily available compute power. With high definition 1080p imaging the norm on home televisions, designers can count on the same on-screen requirements for a number of imaging applications, especially those that clearly benefit from higher resolution.
Time will tell, and as processes shrink and costs drop, multicore will be the norm that will in turn fuel new embedded applications. Given history's example, we can anticipate "more cores" " four may be the mid-range solution and six or eight for higher-end computing requirements.
Continued physical size reduction is critical as well. With Intel's stated embedded roadmap moving from a three-chip solution all the way down to a single-chip solution (even in the not-too-distant future), engineers have more design options.
When high-level performance requires less physical space, designers can simply put more on their boards, using fewer peripheral solutions along the way. As the CPU and chipset merge into smaller quantity pieces, the motherboard is able to contain more within its existing physical footprint.
For example, with a single-chipset solution, a designer might be able to add a communication piece such as firewire " tapping that extra board space to allow for the firewire controller and connector without a separate peripheral.
Higher compute performance, reduced chip count, and lower BOM costs with drastically reduced power consumption will continue to drive multicore's place in embedded design. Better graphics, greater security, acceptable price points ".and as technology shrinks and there is more room available on the die, chipmakers will continue the performance push, using a combination of improvements in circuitry and more advanced manufacturing technologies.
Even plagued with constant competitive pressure - or maybe because of it - it's an exciting time to be an embedded designer.
Christine Van De Graaf is the product manager for Kontron America's Embedded Modules Division located in Northern California's Silicon Valley. Christine has going on a decade of experience working in the embedded computing technology industry. She can be contacted at Christine.email@example.com.