Some in the industry express skepticism about the potential of SOI to improve integrated circuits' performance or reduce their power demands, or both.
We believe the processor industry is in the same place today, relative to silicon-on-insulator technology, as it was in the late 1990's, relative to copper. Lacking broad certainty of SOI's benefits, and risk-averse in a capital-intensive industry and turbulent global economy, many microchip makers have adopted a skeptical, wait-and-see attitude about SOI. If that persists, we believe it will be to the detriment of the industry, particularly for those applications that lend themselves to SOI's power/performance advantages.
Back in 1997, IBM pioneered the use of copper, rather than aluminum, as the material to conduct electric charges between the transistors in a semiconductor. Copper interconnects began appearing in some IBM processors in late 1998. AMD was also an early adopter: a strategic partnership between AMD and Motorola in 1998 led to the development of future process technologies featuring copper interconnects, enabling AMD to become the first company to use copper interconnect technology to build Microsoft Windows-compatible processors.
AMD's Fab 30 in Dresden, Germany began shipping copper interconnect processors in June of 2000, and won Semiconductor International's Fab of the Year award the following year. Fab 30 will ship 50 million processors by the end of 2002, just two an a half years after opening. In retrospect, the difficult decisions that created this remarkable track record should have been easier than they were at the time.
Today, it is apparent that copper was, in fact, another of the revolutions in the development of better performing ICs. Five years after the announcement, and three years after initial industry adoption, of copper interconnects, it's hard to believe the industry resisted the transition from aluminum to copper. Unconvinced of copper's benefits, and uncertain about its risks, adoption of copper technology was not a certainty.
The company's decision about copper reflects these challenges. In 1997, AMD was designing what would become the Athlon processor for 250 nm aluminum technology. The company originally planned to manufacture the chip in its Austin, Texas Fab 25. AMD's early analysis showed a relatively insignificant performance benefit from copper, compared to aluminum.
However, as AMD anticipated the shrinking size of transistors and dies from 250 nm to 180 nm and smaller design rules copper's advantage over aluminum made copper the superior choice. Faced with the decision of equipping its new Fab 30 in Dresden, Germany, AMD made the commitment to equip it for copper production, beginning with the 180 nm design rule node. As the industry standards shrink from 180 nm to 130 nm and smaller, copper's performance benefits are now clear: our engineers have achieved more than a three-fold improvement in frequency from the first AMD Athlon processor, a portion of which can be attributed to the copper interconnects, and most of the industry now manufactures 130nm logic chips with copper interconnects.
An EE's view of SOI
To accommodate exponential growth demands for larger and faster transistor budgets, microprocessor designers constantly push the envelope of technological, physical, and design constraints. SOI can deliver the headroom necessary to continue pushing the envelope for at least the next three to four years. The companies pioneering SOI today consistently find that SOI-based chips improve frequency performance 20 to 35 percent, or diminish power consumption two to three times at the same frequency, relative to bulk CMOS-based processors. In terms of the industry's doubling trend, SOI adoption equates to approximately two years of progress in CMOS technology.
Low power dissipation is a key advantage to SOI as shown in a comparison of dynamic and static power for bulk silicon vs. SOI. In this example of transistors in the same basic architecture, SOI provides a 38 percent improvement in dynamic power and a 46 percent improvement in static power.
In the case of AMD's development of the Hammer technology the upcoming x86-based 64-bit processor SOI enables significant improvements in the number of transistors on a processor. For example, a hypothetical desktop processor using 70 watts will run an AMD bulk silicon processor with about 40 million transistors. Our 64-bit desktop processor, the AMD Athlon based on Hammer technology, will operate approximately 100 million transistors at the same 70 watts.
We were able to accomplish this significant advancement because SOI reduces total transistor capacitance 20 to 25 percent compared to bulk silicon, and enables reduced operating voltage. This technology is clearly positioned to improve the performance and decrease the power consumption of tomorrow's ICs.
It's also easy to see how important SOI's reduction in power will be to mobile, wireless, and other ultra-low-power products and applications: the ability to decrease power consumption by as much as half, without any decrease in performance, is an essential factor in the continued advancement of portable computing devices.
As scientists and engineers experiment with all the silicon technologies, it's easy to foresee continual improvements to the SOI process that may culminate in fully depleted SOI processors, as well as the combination of two important silicon advances by extending SOI technology to strained silicon.
Ultimately, the flexibility of engineers to trade improved performance for decreased power, or vice versa, will create entire new markets for more powerful or more energy efficient processors as they find the balance most appropriate for their solutions.