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Time is right for clockless design

6/10/2010 01:00 PM EDT
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NatM
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re: Time is right for clockless design
NatM   9/13/2010 6:30:10 PM
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Octasic has introduced a family of DSPs that are based on asynchronous technology. This white paper shows how asynchronous technology offers a 3x gain in performance per watt. You can read the white paper here: http://www.octasic.com/en/tech/opus_dsp.php

Antoine Sirianni
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re: Time is right for clockless design
Antoine Sirianni   7/24/2010 8:46:56 AM
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Should you think you can afford it.

p_g
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re: Time is right for clockless design
p_g   7/23/2010 5:55:46 AM
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Antoine, I wish to bin lot of them in high speed bin :) And this is what async design can achieve.

Antoine Sirianni
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re: Time is right for clockless design
Antoine Sirianni   7/20/2010 8:40:03 PM
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I hope you are not going to bin too many of them ;-)

p_g
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re: Time is right for clockless design
p_g   7/16/2010 10:32:42 AM
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Clockless design certainly have a big advantage of low power and mobile computing devices running on battery can gain a lot here. Since the speed of async design is purely based on process corner of silicon, it helps a lot in binning where fast part can serve great speed.

DKC
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re: Time is right for clockless design
DKC   6/21/2010 9:35:12 AM
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"Clockless needs standard languages" I worked on the SystemVerilog committee and attempted to add support for asynchronous constructs way back before it went to the IEEE - with no success. That failure encouraged me to investigate ESL solutions that would support asynchronous design using C++. So ~ 6 years on I have an extended C++ that will support asynchronous design - http://parallel.cc Good luck with SystemVerilog for asynchronous design - it's not much good for power aware design either.

Les Slater
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re: Time is right for clockless design
Les Slater   6/15/2010 8:36:45 PM
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Back in ‚??95 or so I had a lengthy discussion with Fred Pollack of Intel about microprocessor architecture. He was pushing long pipelines and fast clocks at the time. The penalties of pipeline flushes were discussed. I suggested that maybe a better use of Moore‚??s Law might be to put multiple processors on a single die. His response was that the software industry was nowhere near prepared to effectively use such. That was only 15 years ago. When we got boxed into a technology corner we got serious. We are yet still at a primitive stage of parallel processing and asynchronous design may be more complex in SOME respects but I think the vision of the promise will bring positive results. And as for building a ‚??a complete system including sophisticated software...‚?Ě. That‚??s what the last paragraph of my previous post was alluding to.

Antoine Sirianni
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re: Time is right for clockless design
Antoine Sirianni   6/15/2010 7:07:36 PM
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There has been a long track of academic research on asynchronous design since 3/4 decades. Some companies like Handshake Solutions (not mentionned in the paper) have delivered mature solutions to the market. Yet there are less obvious drawbacks than tooling like: the lack of controllabilty (no time preemption, reduced test capability, problems with reset), the cost (extra area, extra nre). And you still need to build a complete system including sophisticated software... So up to you ...

Les Slater
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re: Time is right for clockless design
Les Slater   6/15/2010 4:27:09 PM
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"...the envelope is somehow constant for a given technology node." In the context of moving to clockless or mixed it seems that the concept of envelope is vague at best. There are obvious trade-offs though. The obvious one is lack of mature tools and experience. I believe that it will take a totally new look at methodology starting with the definition of the problem space. What do we really need to accomplish?

Antoine Sirianni
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re: Time is right for clockless design
Antoine Sirianni   6/15/2010 12:35:41 PM
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Design in the realm of silicon based systems is a matter of trade-offs and the envelope is somehow constant for a given technology node. If you put emphasis one hand, you will loose on some other. What is it that you loose designing asynchronous circuits? Besides, as far as I know, Dr. Strangelove in Stanley Kubrick's movie was inspired from John Von Neumann.

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