One of today’s most popular nonvolatile memories is Flash memory, which is based on charge storage. However, manipulating charges at shrinking device sizes is increasingly difficult. This has motivated researchers to search for non-charge based alternatives. Resistance random access memory (ReRAM) is one possibility mentioned frequently. ReRAM usually adopts a capacitor-like structure in which the resistance-change material is sandwiched between two electrodes. When proper electrical stresses in the form of current or voltage are applied, the conductance of the material can be altered accordingly in a nonvolatile way, such that single-bit or even multi-bit data may be stored. The initial observations of such electrical phenomena date back to the 1960s, the same period when studies on phase-change memory, another alternative nonvolatile memory technology, also began. In fact, these two approaches to memory are similar in both function and structure.
ReRAM has several advantages over Flash in future applications. First, ReRAM facilitates "equivalent scaling" by enabling easier three-dimensional stacking architectures thanks to the simpler two-terminal configuration of the ReRAM memory cell. Equivalent scaling is the addition of functionality to an existing device, rendering it unnecessary to make multiples of smaller devices for the same performance. Secondly, the non-charge based and often filamentary nature of switching in ReRAM has been considered promising for future device scaling, given that the eventual device size could be reduced to a scale comparable to the switching region. Thirdly, the achievable sub-microsecond switching speed enables faster data storage than Flash technology, which relies on charging/discharging processes at microsecond level. Despite these advantages, ReRAM largely remains in research labs. Industry needs to see the promise of a new technology several generations (instead of one or two generations) beyond the current one before deciding upon investment for the costly and risky technological change-over. The need to integrate different materials into manufacturing processes can further delay the adoption of such new approaches.
The recent demonstration of ReRAM from only silicon oxide, one of the most common materials in the semiconductor industry, appears to take ReRAM one step closer to technological reality. Silicon oxide has long been used as an insulating and passive component in electronics. For example, it serves as the energy barrier in Flash technology so that charges (electron) can be stored in the floating gate that modulates conduction in the silicon channel. In conventional Flash, neither silicon nor silicon oxide undergoes chemical or structural changes, such that all the silicon and oxygen atoms sit at the same places regardless of the memory states. In contrast, in the newly demonstrated ReRAM, the silicon oxide changes from its passive role into an active one. Under electrical bias, an electrochemical process strips away some oxygen atoms locally inside the silicon oxide, leaving the silicon atoms to congregate and form a nanocrystalline pathway (silicon filament) that conducts the current. When proper voltages of different magnitudes are applied, the silicon filament can be repeatedly broken or connected to form OFF and ON states, to serve as a nonvolatile switch or memory. This oxide ReRAM would be integrated into a crossbar architecture (along with access devices) to make memory arrays.
The filament can be made of anything, as long as it is localized and allows a mode of conduction. Just as nitride traps can hold charge for SONOS, MONOS etc., oxide traps or other defects can conduct current. Just like for charge trap flash, the trap defect density could be crucial.
The problem I have with memory that is scaled down is too few electrons moving in and out or staying in one place. Noise is significant.
Is the filament a single-atom chain? Once the first filament is made, the forming potential collapses and no more filamentation can occur. To make multiple parallel chains you need individual switches for each chain (not space-efficient).
To make chains rugged, the forming must be well-characterised to ensure each chain is 'properly' formed every time, otherwise thermal etc effects could cause it to go high-resistance. No opportunity for refresh like DRAM in a non-volatle memory, unless a pseudo-static approach is feasible. The advantage of the charge-based memory types is that you aren't relying on a single electron being in the right place at the right time (well, alright, on average you are :-); they are parallel-architectures not serial like this one. I'd love to hear more and understand how these issues are being overcome.
Editor's Note: I came across the authors' research on the ACS web site and contacted them to see if they were willing to write up their work for the Memory Designline. Happily, they agreed and have given us a glimpse into some of the research going on in resistance random access memory (ReRAM). Please read and share your comments.
David Patterson, known for his pioneering research that led to RAID, clusters and more, is part of a team at UC Berkeley that recently made its RISC-V processor architecture an open source hardware offering. We talk with Patterson and one of his colleagues behind the effort about the opportunities they see, what new kinds of designs they hope to enable and what it means for today’s commercial processor giants such as Intel, ARM and Imagination Technologies.