Part 1 of this article explained the challenges associated with implementation of large Li-Ion battery packs for automotive applications and highlighted the advantages of active balancing vs. passive balancing methods.
In this part, popular active balancing methods are reviewed and details given of a unique active cell balancing battery management system.
Hybrid electric and EV battery packs contain up to several hundred cells and are divided into modules. The need for module balancing is as important as the need for cell balancing due to module parameters mismatch, unequal temperatures affecting performance and causing uneven ageing, or the need to replace bad modules with new ones for maintenance purposes.
One of the methods providing module balancing capability involves connecting the circuitry of each module to one cell of the adjacent module to provide a path for charge transfer. This method is inefficient because the charge has to be transferred to one cell and redistributed among all cells of the module. Transferring the charge to a far away module requires several steps and the efficiency drops further.
A key to superior battery management system (BMS) performance lies in the accuracy and speed of the cell voltage measurement.
The cell voltages are affected by the fast changing currents. It is critical to measure the entire pack cell voltages almost simultaneously to guarantee the precision of the state-of-charge (SOC) and state-of-health (SOH) estimation.
Read the full article here, which describes a National Semiconductor solution optimized for large battery packs without the performance limitations of BMS solutions burdened by the legacy of small battery pack applications. (Courtesy of Automotive Designline Europe)
I'm very interested in the BMS circuit board mentioned in the full article (on Automotive Designline Europe), but I couldn't find any information on NS' web site. Does anyone know whether it's commercially available?
The author just provide a too simplified idea on this topic. Active balancing is a very hot topic in BMS field and I know many companies are actively design solutions but none is successful yet. If NS is really doing good thing here, I hope to see some more details on the design and see how robust and reliable this solution is.
With no offense to the writer, i fail to see the usefulness of this article other than promoting the new chip. It just highlights the obvious problems faced by the series architecture and some cumbersome solutions which were proposed in the past. It would have been much appreciated if the internal functional diagram of the projected chip was discussed and possibly with an example case-study.
David Patterson, known for his pioneering research that led to RAID, clusters and more, is part of a team at UC Berkeley that recently made its RISC-V processor architecture an open source hardware offering. We talk with Patterson and one of his colleagues behind the effort about the opportunities they see, what new kinds of designs they hope to enable and what it means for today’s commercial processor giants such as Intel, ARM and Imagination Technologies.