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Creating a PC-controlled, FPGA-based waveform and timing generator (WTG)

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Miguel A. Risco Castillo
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re: Creating a PC-controlled, FPGA-based waveform and timing generator (WTG)
Miguel A. Risco Castillo   3/12/2011 5:25:39 AM
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Arbitrary FPGA Waveform Generator: https://docs.google.com/viewer?a=v&pid=sites&srcid=ZGVmYXVsdGRvbWFpbnxtaWtyb2VsZWN0cm9uaWNhfGd4OjQzNDBlODgwMTQ5ODBhNzI&pli=1 http://ue.accesus.com/wavegen (in Spanish)

John.Dailing
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re: Creating a PC-controlled, FPGA-based waveform and timing generator (WTG)
John.Dailing   2/20/2011 12:32:47 AM
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No problem Max; RamRod just took the title and opening sentence a little too literally, and then in his disappointment at not getting all the "how-to" details he was expecting, he left his brusque comment.

Max The Magnificent
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re: Creating a PC-controlled, FPGA-based waveform and timing generator (WTG)
Max The Magnificent   2/15/2011 7:47:08 PM
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Max here -- guilty as charged -- I did write the title and opening sentence (I was trying to "set the scene") -- my bad -- take me outside and spank me now!

John.Dailing
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re: Creating a PC-controlled, FPGA-based waveform and timing generator (WTG)
John.Dailing   2/15/2011 7:31:03 PM
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"brusque": abrupt in manner; blunt; rough. I'm glad I know that word now, because it accurately describes RamRod's initial comment. This is not a how-to article. The WTG itself involved circuit design and layout, verilog programming, and PC application development. The "do-it-yourself" or "how-to" details of these obviously cannot be described in an magazine article. This article just shows what can be developed using Opal Kelly's FGPA modules, and describes what was developed. The article title and opening sentence was written by Max, I presume. The "how" he was referring to is not a "detailed how-to" but more of a "general how"; i.e. a mating board was designed, the FPGA code was written, a PC application was developed. This should have been obvious by reading the article, but perhaps it wasn't obvious to RamRod ... judging by his "brusque" comment.

RamRod
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re: Creating a PC-controlled, FPGA-based waveform and timing generator (WTG)
RamRod   2/10/2011 4:36:00 PM
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Mr. Dailing, your article starts out as "This article describes *how* a PC-controlled Waveform and Timing Generator (WTG) Instrument was developed ...". My "creating" question was simply because you've left the "how" out. For example, what GUI toolkit: Visual? Qt? Also, did you employ an embedded soft-uC to make some aspects easier? Or, certain IP blocks either from your firm or others? Any internal phased-clock/PLL schemes of interest? And were there certain signaling or other notable hurdles that required some clever solution? However, since you've resorted to brusque name-calling instead of considering the real intent behind my post, I no longer care. Some of us primarily read these "Design Articles" to gain such useful how-to insights, and therefore I'll remain standing next to my earlier comment (but again, I no longer care).

_hm
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re: Creating a PC-controlled, FPGA-based waveform and timing generator (WTG)
_hm   2/6/2011 6:55:19 PM
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For long, concept was there, but product with good specifications are evoloving now. Cool product! I browsed through text, but could not locate cost of it? Will you please provide it? How does it compare to other low cost instruments? Also, when one purchase this CCAs and API - product, he may like to get proper enclosure with it so it can be used, transported with ease. It will also prolong product life.

KB3001
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re: Creating a PC-controlled, FPGA-based waveform and timing generator (WTG)
KB3001   2/6/2011 6:45:43 PM
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We need more "Opal Kelly"'s in the market with standard iterface and API offerings, to bring FPGA system development down.

John.Dailing
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re: Creating a PC-controlled, FPGA-based waveform and timing generator (WTG)
John.Dailing   2/6/2011 6:41:14 PM
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JGW, The WTG does not use USB power for FPGA or mating module; it has a separate power supply with common mode chokes on the PCB, which prevent grounds loops. Also the 5VTTL drivers grounds are isolated from FPGA digital ground, as there is a common mode choke between external power and 5VTTL power and a common mode choke and regulator between external power and 3.3V Digital. The other digital outputs are LVDS which is differential. If external power and/or the analog loads were earth grounded, a ground loop would exist, except again there is a common mode choke in the loop that would prevent ground loop currents from flowing.

John.Dailing
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re: Creating a PC-controlled, FPGA-based waveform and timing generator (WTG)
John.Dailing   2/6/2011 6:21:26 PM
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Where is the Creating? Opal Kelly created the FPGA board, USB controller software, Verilog modules, USB driver, and PC software. I created a module that mates to the Opal Kelly FPGA board, Verilog code, and Control GUI. And I'm using the WTG in R&D instruments that are providing scientific breakthroughs in the study of Brillouin and Coherent Rayleigh scattering for structural integrity application. Is that enough "creating" for you, LameRod?

RamRod
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re: Creating a PC-controlled, FPGA-based waveform and timing generator (WTG)
RamRod   2/3/2011 4:15:22 PM
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Where's the "Creating"? Seems more like a technical-marketing sparkle-sheet, or at best a H/W-architecture and GUI fit&finish example?

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