Microcontroller design for automotive applications is challenging to say the least. More than design, it’s the environment in which the semiconductor components operate that makes them vulnerable to failure. And most common failure issues seen in microcontrollers are with power supply sensitivities.
Supply startup profiles can be a non-linear ramp or a saw-tooth waveform. This situation is more aggravated under cold startup conditions wherein the non-linearity can get out of control. Systems can fail to boot up if such conditions are not accounted for in your design.Semiconductor designs are also sensitive to power supply variations. Microcontrollers must be able to handle supply non-linearity in a robust manner and come out of reset in a known condition.
And to meet the“Zero Defect” criteria in many automotive designs, the SoC must have measures in place to tackle the supply sensitivities and ensure a robust system operation. This requires necessary protective components inside SoC and the use of analog peripheral controls and robust power-on indicators to operate with zero defect.
Challenges with power-on and supply noise in auto environments
SoC design assumes constant supply of operation , but in reality power supplies always have non-linearity behaviors especially at power-on. For one thing, external power management control is difficult to handle because it is a closed loop system that needs regulators, peripherals, logic , and analog components that must work together in a defined protocol. If built into an SoC such protocols are more robust and able to handle failure conditions and tampering.
On chip voltage regulation is also critical in handling such conditions. Regulators have a “supply filter” mechanism to attenuate the noise on its external supply to its output. Called the PSRR (Power Supply Rejection Ratio), it works to your advantage if the current load on regulator is low and against you if the current load-on regulator is high.
Figure 1: Regulator response to supply noise @ no load
As a result, in a full run condition any external supply noise can couple in many different ways to the system and cause problems which are hard to predict and compensate for. Figure 1 above and Figure 2 below indicate the response of a regulator to external noise with different current load conditions
Figure 2 : Regulator response to external supply noise @ full load
Care should be taken not to have any low power techniques in a high IDD condition as this can cause bitcell Flip/latch to lose its data. Figure 3 below indicates the noise margin of a memory bitcell with supply noise with and without low power options of back bias.
(To view larger image above, click here)
(To view larger image above, click here)
Figure 3: Memory BitCell Stability with Source Bias
The above data shows that memory bitcell noise margin reduces by 2X if load leakage options of source bias is deployed. This increases vulnerability to supply noise in automotive environment. Such techniques can be deployed with low power modes but only with less regulated loads.
Power Sequencing – No predictability
High end microcontrollers will have many add-on components including data converters for sensor tracking, USB/Ethernet for communication, external memory interfaces to expand software code, display controllers, and multiple ports operating at different supply levels.
Due to this, a typical high end microcontroller will have many supply pins independently controlled. While its good to have independent supply for each component , it also means that it is critical that you manage these supply power on/off sequences correctly. This is a huge task for an automotive systems/board designer due to many unpredictable conditions in each supply. Figure 4 below indicates such a condition.
Figure 4 : Typical sequence restriction in an application (To view larger image, click here)
It is also important that the design is able to handle any power supply sequence and come out of reset in a stable ordered state.. Some conditions that have to be met with in regard to power sequencing include:
- No diode forward bias with supply ramp order
- No protocol violations with supply ramp order
- No high current conditions with supply ramp order
- No risk of latch up when supplies go live at different times