The design of reliable high-speed links is a challenging task because of the stringent electrical specifications for those systems. Modeling and simulation tools that can help predict the performance and optimize the design of these systems must be robust and reliable. One major challenge in the prediction of waveforms propagating in high-speed channels is the nonlinear behavior of the I/O buffers in these links. These blocks may in addition include components such as equalizer and clock recovery systems that aim at improving signal integrity. One objective of the high-speed link community has been to find a practical, reliable and straightforward approach for modeling these systems. Adequate tools for serving this purpose must possess several attributes.
First is the issue of vendor IP protection. Most commercial circuit simulators such as SPICE require internal device and process parameters as part of their input in order to generate accurate simulation results. IC manufacturers however do not want to release design information in order to maintain a competitive advantage. Consequently, the exchange of information in a blackbox format has been found to be more suitable. In the blackbox format, look-up tables or network parameters that offer a behavioral description of the systems from the terminals or ports are used as the vehicle for simulation and design.
Next, the tools must be efficient and accurate. The network complexity found in serial links makes traditional SPICE simulations intractable. If in addition, nonlinear effects are taken into account, simulations can run for days if not weeks before meaningful data can be retrieved. When all the transistors in a network must be described in detail, the system matrix size describing the system becomes very large which makes the actual simulation very inefficient.
Network parameters have historically been instrumental to the study of signals and systems and to the design and modeling of communication networks. They have however been limited to linear time-invariant (LTI) system. An LTI system is one that will transfer a signal from its input to its output while preserving certain characteristics of the signal. More specifically, the frequency of a continuous wave excitation is preserved as the signal travels through the LTI system. Also, for a given frequency, if the input signal is delayed by a given amount, the output signal will experience a delay of the same amount. For an LTI system the input-output relationship is analytically simple and straightforward and can be expressed using multiplication in the frequency domain as a result of the principle of superposition.
Behavioral models such as scattering parameters have been instrumental in meeting the simulation needs for high-speed applications because of their versatility and compactness. In addition, because of their black box nature, they insure the protection of intellectual property (IP), they are computationally efficient, they account for frequency dependence and can be easily combined with signal processing techniques for predicting time-domain behavior. S parameters possess in addition the useful property that they can be concatenated. Thus in a serial link, several S-parameter blocks can be combined to generate the S-parameter representation of the composite system. This offers the potential for different vendors to combine different models into a design using the S-parameter description.
Finally, S parameters can be conveniently measured using vector network analyzers (VNA). These instruments have found widespread use not only in RF/microwave applications but also in signal integrity analysis. Accurate frequency-dependent representations of two- and four-port networks can be captured over wide frequency ranges and processed for modeling and simulation.
One major limitation with S parameters is that they can only be used to characterize linear networks or linear time-invariant (LTI) systems. In a typical I/O channel, several of the sub-blocks behave as LTI networks; however, other blocks that contain logic devices and transistors and as such are not expected to operate in a linear manner. For these subcircuits, an S-parameter description cannot be used. For several decades, designers have been wrestling to determine a comprehensive approach to tackle this problem and a compact and universal standard for describing nonlinear behavioral model has been lacking preventing any significant breakthrough in nonlinear circuit analysis.
David Patterson, known for his pioneering research that led to RAID, clusters and more, is part of a team at UC Berkeley that recently made its RISC-V processor architecture an open source hardware offering. We talk with Patterson and one of his colleagues behind the effort about the opportunities they see, what new kinds of designs they hope to enable and what it means for today’s commercial processor giants such as Intel, ARM and Imagination Technologies.