When choosing a high-speed data converter, power consumption is one of the most important system design parameters. Whether portable designs are squeezed for longer battery life, or a product gets physically smaller and can’t dissipate as much thermal energy, the power dissipation of the data converter has become critical.
Traditionally, system designers powered the data converter from a low-noise linear regulator, such as a low dropout regulator (LDO) rather than a switching regulator. This is because they worry that switching noise will feed into the output spectrum of the converter and significantly degrade AC performance.
However, newer-generation switching regulators, which are noise-optimized for use in cell phones to minimize interference with close-by LNAs and PAs (low noise amplifiers and power amplifiers), allow for a change in practice. They enable high-speed data converters to be powered directly from a DC/DC converter without significantly reducing AC performance. This article explains how this design instantly improves power efficiency by at least 20 percent—and as much as 50 percent.
Modern high-speed converters reduce their power consumption by approximately 50 percent over previous generations, partly by lowering the power-supply voltage from 3.3V to 1.8V. As the supply rail goes lower in a LDO-based design, the LDO dropout voltage, as well as available power rails to regulate down from, becomes more critical for power efficiency. On the digital section of the board, typically there are many different voltage rails available to service the various core and I/O voltages of FPGAs and processors. However, on the analog section, only a few ‘clean’ options like 5V and 3.3 V may be available.
For a high-speed data converter, a 3.3V supply may be generated via linear regulator from a common 5 V rail. This 1.7V drop in the LDO regulator equates to a power loss of approximately 35 percent. When using an LDO regulator to derive the 1.8V supply of the ADC from a 3.3V bus, using the ADS4149 ADC as an example, the power loss in the linear regulator increases to approximately 45 percent. That means almost half the power is dissipated in the LDO. This illustrates how easily the 50 percent power reduction can be lost by inefficient power design.
The efficiency of a switching regulator is fairly independent of the input supply rail and, therefore, offers a significant power savings. With careful design the impact on AC performance can be minimized.
A key component in isolating the switching noise from the analog-to-digital converter (ADC) is the power-supply filter, which consists of a ferrite bead and the bypass capacitors. There are several critical characteristics to consider when choosing a ferrite bead.
First, the ferrite bead needs to have sufficient current rating for the data converter as well as a low direct-current resistance (DCR) to minimize the voltage drop across the bead itself. For example, a supply current of 200mA through a bead with a DCR of 1Ω leads to a 200mV drop of the supply voltage. This may push the voltage at the ADC close to the edge, or even below recommended operating conditions when factoring in standard supply-voltage variations.
Figure 1: Insertion loss comparison of conventional ferrite bead
and Murata EMI filter overlaid with the DC/DC switching frequency
and its harmonics.
(Click on image to enlarge)
Second, the ferrite bead must have high impedance at the switching frequency and harmonics of the DC/DC converter, in order to block the switching noise and switching spurs. Most of the available ferrite beads have their impedance specified at 100 MHz, while the switching frequencies of modern DC/DC converters typically are between 500 kHz and 6 MHz.
In our example, the ADS4149 evaluation module (EVM) uses a switching regulator with a switching frequency of 2.25 MHz. In this instance, we are using the TPS62590 for our switching regulator. Since DC/DC regulators have a square-wave output, the higher-order harmonics need to be considered as well. An electromagnetic interference (EMI) filter from Murata (NFM31PC276B0J3) was found to give a high impedance in that frequency range along with very low DC resistance.
Figure 1 compares the insertion loss of a traditional ferrite bead (68Ω at 100 MHz) against the Murata EMI filter. Power-supply circuits are very low impedance while the insertion loss is measured in a 50Ω environment. Hence, the insertion-loss magnitude of the power-supply filter may be slightly different, although the resonant frequencies won’t change.
Figure 2: Insertion loss comparison of different power-supply filter configurations
overlaid with the switching frequency and harmonics of the DC/DC converter.
(Click on image to enlarge)
The other components of the power-supply filter are the bypass caps. The values of the capacitors should be chosen so that their resonant frequencies, which create a low-impedance path to ground, are close to the switching frequency. This is so that switching noise passing through the bead is shorted to ground.
The insertion loss comparison of the power supply filter in Figure 2 shows that the proper bypass-capacitor values create a resonance close to the switching frequency, even when combined with a traditional ferrite bead (e.g., EXC-ML32A680). However, at low frequencies there is not much difference compared to replacing it with a zero-ohm (0Ω)resistor. On the other hand, the Murata EMI filter provides about an extra 20 dB attenuation around the switching frequency.
Figure 3: Power-supply filter schematic with final capacitor values.
The final power supply filter schematic is shown in Figure 3. A 33 μF tantalum capacitor is used for broad frequency decoupling while the 10 μF, 2.2 μF, and 0.1 μF are ceramic ones with a more-narrow resonance frequency.
Depending on the power supply rejection ratio (PSRR) of the data converter, a certain amount of noise on the power rail still makes it into the ADC and degrades its AC performance. The signal to noise ratio (SNR) and spur free dynamic range (SFDR) sweeps in Figure 4 compare a benchmark supply (e.g., 1.8V clean lab supply) against an LDO and DC/DC converter with different power supply filter options using the ADS4149 EVM..
Figure 4a and 4b: Sweep of SNR (upper) and SFDR (lower) across
input frequencies for different power-supply options
and filters (Fs = 250 Msps).
(Click on images to enlarge)
Our test results show very minor SNR performance degradation (~0.3 dB at 300 MHz IF) when powered by a switching regulator compared to a low-noise LDO. The SFDR performance is also nearly identical between the different setups.
A closer look at the normalized fast Fourier transform (FFT) plot, which starts at the input signal and plots noise versus offset frequency, shows a slightly elevated noise floor across the Nyquist zone when using the sub-optimal ‘EXC’ ferrite bead. However, no evidence of any feed-through of the switching frequency as demonstrated in Figure 5.
Figure 5: FFT plot normalized to the input signal shows no trace
of a switching spur in the output spectrum.
(Click on image to enlarge)
As outlined earlier, the main advantage of using a DC/DC converter instead of a linear regulator is power savings. In all the prior experiments on the ADS4149 EVM, both the LDO and switching regulator were powered from an external 3.3V supply, which is a common analog supply rail. The measured power efficiencies are illustrated in Table 1, which also include their respective quiescent currents.
This comparison shows that when using the LDO, the LDO itself consumes almost as much power as did the ADC. The switching regulator option only dissipates 32 mW more than an ideal solution, achieving a very efficient power design. The efficiency with the LDO could be further improved by stepping the input voltage down first from 3.3 V to, e.g., 2.5 V or 2.2 V, at the expense of increased system cost and size.
Despite having more external components than the LDO design, the footprint of a DC/DC converter solution overall may be smaller because newer DC/DC converters have higher switching frequencies that drastically reduces the inductor size (e.g., ~2.2 μH for 2.25 MHz instead of 33 μH for 500 kHz).
Conversely, linear regulators may require less power-supply filtering, but they are also limited on how small their packages can get because they typically dissipate more power. From a cost perspective, the switching regulator solution may be slightly more expensive due to higher component count. Still, the increased efficiency can save cost in thermal-dissipation techniques and the system power budget.
You can see a short presentation on this topic by the author here or view it directly here:
As system designers are pushing for more power-efficient components, changing the power architecture on a high-speed data converter design to switching regulators can bring a large power saving. This article demonstrates how a low-power high-speed data converter can be powered directly from a switching regulator without significantly degrading its AC performance.
Learn more about ADCs and switching regulators by downloading these datasheets:
Ask questions, share knowledge, explore ideas and help solve problems with fellow engineers at TI’s E2E™ Community: www.ti.com/e2e-ca.
About the Author
Thomas Neu is a systems engineer for high-speed data converters group at Texas Instruments, where he provides applications support. Thomas received his MSEE from Johns Hopkins University. He can be reached at firstname.lastname@example.org.
LDO itself usually won't have good attenuation at switching frequency up at MHz so I guess this comparison is not yet optimized. In fact, having only 20dB attenuation may be good enough for ADC but it is still not good for very noise sensitive sections like PLL in which very low phase noise is desirable. Jim Williams of Linear Technology has a very good article that tells people a ferrite bead is good for high switching noise filtering while LDO is only good for low frequency noise (in which PLL still has to rely on).
Thanks -- interesting info.
It's interesting that the Murata part is effective, since it's apparently a 27 uF feedthrough cap, with no series inductance. The insertion loss measurements may be misleading, because without any series inductance the 50 ohm source impedance may play a dominant role.
GREAT-Terry, thanks for reading my article. You’ve raised a good point. Our customers typically use the low noise LDO in two ways – either as the main power source for the ADC to generate a ‘clean, noise-free’ power rail or as a ‘clean-up’ device after a dc/dc converter for a more power efficient solution. As you mentioned, the actual PSRR of the LDO in the switching frequency range is not very high, so its benefit is limited. In the cases we’ve investigated, that’s usually sufficient for the ADC, but it results in increased power consumption, and we’ve found dissipating an extra 20-40% of power in the LDO unnecessarily, especially in portable battery powered products. With proper design, the ADC can be powered by a dc/dc converter and achieve similar performance as with the LDO. However attention must be given to the power supply filter, and that’s where we’ve noticed a big difference. I’ve tried many different ferrite beads, and it always came down to impedance around the switching frequency, which is what we’ve tried to optimize. While our experiments in this area have focused on improving the power efficiency of designs with high-speed ADCs, there’s a significant opportunity for further research in the RF arena to drive down power consumption even more.
Keep in mind that the effective in-circuit self-resonant frequency of a surface mount ceramic capacitor is heavily influenced by the length of copper etch from vias to pads and by via inductance to planes. For best results place 3 vias at each pad with just the bare minimum of etch length needed to keep solder confined to the pad. Also capacitor dielectric should be good RF quality such as NP0 or X7R.
Thanks for a very pertinent article as I am designing an ADC PSU using the TPS62590 right now.
A couple of items;
If the Murata part is a 27uF capacitor, then are the 33uF Tant and 10uF Ceramic doing anything?
In your setup, was there any impedance between the TPS62590 PSU output cap and the Murata cap, or was the Murata cap effectively part of the PSU output capacitance?