Many parametric test engineers are learning to cope with new high voltage process requirements. Not surprisingly, high voltage processes require high voltage parametric testing for process control and reliability monitoring. Part of the challenge lies in the fact that these new high voltage requirements add to the list of parametric tests rather than replacing some portion of it.
In many if not most cases, the high voltage transistors are controlled by complex logic that requires low voltage/low current parametric test. Consequently, both high voltage and logic tests have to be addressed within the same test plan while minimizing impact on throughput.
How did this happen?
The IC industry has been delivering on Gordon Moore’s prediction of doubling transistor density every 18 months and has done so for nearly half a century. As computing power soared, the need to integrate more of the product functionality into a single chip has led to concepts like 'More than Moore'.
Whereas Moore referred to transistor density scaling, 'More than Moore' speaks to scaling the circuit board down to a single chip. The power devices that once lived on the circuit board are increasingly integral to the IC itself.
One of the first areas to benefit from the 'More than Moore' philosophy is power management. Power management comes in several flavors, including smart power management, green power management, and integrated power management. In every case, the combination of computational power, programmability, and high power driver circuits provide a platform to control and manage power and, consequently, to exercise control over the real world.
For example, let’s consider Bipolar-CMOS-DMOS (BCD) technology. The term BCD is often used to describe a number of variants, including combinations such as CMOS-LDMOS, NMOS-LDMOS, etc. The general case can be described as a single-chip IC that includes CMOS logic, as well as bipolar and DMOS driver circuits that support high current, high voltage, and high power control.
Most of yesterday’s BCD technologies were limited to less than 100V. Although providing impressive performance, these devices are easily characterized with existing parametric test systems. Today, a class of BCD technologies have emerged that use LDMOS to support voltages as high as 700V or 800V, clearly showing an upward trend. These devices require special consideration when developing a parametric test strategy. It’s expected that BCD technologies will exceed 1000V by about 2012. Such high voltage devices are currently used for applications such has high intensity discharge (HID) illumination, where a combination of high voltage and high power is needed.
There are a variety of applications for high voltage BCDs:
David Patterson, known for his pioneering research that led to RAID, clusters and more, is part of a team at UC Berkeley that recently made its RISC-V processor architecture an open source hardware offering. We talk with Patterson and one of his colleagues behind the effort about the opportunities they see, what new kinds of designs they hope to enable and what it means for today’s commercial processor giants such as Intel, ARM and Imagination Technologies.