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Using high-density programmable FIFOs in video and imaging applications

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perriejb
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re: Using high-density programmable FIFOs in video and imaging applications
perriejb   5/19/2011 9:28:22 AM
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Héhé this article describes the exact decision procedure that we went trough when designing a 2 camera, simultaneous capture FPGA interface.

SIVS
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re: Using high-density programmable FIFOs in video and imaging applications
SIVS   4/20/2011 4:46:22 AM
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the peak power consumption of the FIFO discussed is about 1.2Watt. Could not make any measurements on DDR SDRAM implementations.

Max The Magnificent
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re: Using high-density programmable FIFOs in video and imaging applications
Max The Magnificent   4/15/2011 8:26:58 PM
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I don;t know -- I'll contact the authors -- Max

Guribilling
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re: Using high-density programmable FIFOs in video and imaging applications
Guribilling   4/15/2011 8:25:13 PM
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Is this article available in PDF format?

DrFPGA
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re: Using high-density programmable FIFOs in video and imaging applications
DrFPGA   4/14/2011 7:49:06 PM
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This is a good article in that it covered the bandwidth and cost trade-offs in great detail. Thanx! One additional thing I would like to see is a power comparison. Any thoughts on what that would show?

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