Researchers at the Missouri University of Science and Technology’s EMC lab study the effects of ESD and develop models that designers can use to predict the performance of the protection they add to electronic circuits.
Design engineers often add ESD (electrostatic discharge) protection to electronic circuits, and then test engineers or EMC (electromagnetic compatibility) engineers must verify that a discharge won’t harm the circuits. Students and faculty at the Missouri University of Science and Technology’s EMC lab study the effects of ESD and develop models that designers can use to predict performance.
In a recent paper, graduate student Dazhao Liu and others developed a SPICE model of an air-discharge ESD event. Their goal was to estimate an arc length based on a rise-time measurement of current discharged into a device. From the arc-length model and the impedance of the DUT (device under test), the researchers simulate the effects that ESD will have on a device. Those effects include electromagnetic fields produced by the discharge, which can couple into PCB (printed-circuit board) traces and produce damaging currents.
Read more about this research and get a link to the original paper here.