(Editor's note: Touch-sense interfaces, especially using capacitance sensing, are increasingly popular and common in consumer products, appliances, and even test instruments, including medical products. To see a list of all articles we have published on this topic, click here.)
(Part 1 looked at basics of capacitive sensing and tuning.)
Capacitive sensor performance is highly dependent on physical property/characteristics of the sensor board and environmental/operating conditions. For example, sensor performance is affected by sensor capacitance changes due to PCB manufacturing process variations, whenever overlay material or thickness changes, or the PCB vendor changes.
The challenges do not stop here. Parasitic capacitance also varies with environmental conditions (noise floor) such as temperature and humidity. Thus, a board tuned in the Alps may not work in the hot and humid climate of Hong Kong, resulting in more time and labor to tune the board again. To minimize yield losses due to process variation or vendor change, tuning needs to take into expected differences based on statistical analysis.
There may also be reasons when the board layout needs to be redone such as changing a button size, moving traces on the PCB to incorporate minor changes in the schematic, resizing the PCB to address different EMC/EMI issues, and so on. All of these modifications require that sensors be tuned again. Moreover, the tuning process needs a communication protocol and a host-side application to observe and analyze the raw sensor data. Extra I/O will be needed since tuning must be done after the final board has been made, creating potential issues for systems with pin constraints.
It is clear that tuning is not an easy job to do, requiring significant expertise and experience with the chips involved and an understanding of capacitive sensing effects at very low signal levels. When coupled the time-to-market constraints of the appliance market, tuning can impose significant delays and increases to system cost.
To cost-effectively handling design constraints and market needs, tuning is most efficiently implemented to be handled by the appliance itself. An ideal self-tuning system will perform this task as shown in Figure 7.
Figure 7: Self-tuning-based capacitive sensing system
In systems capable of self-tuning capacitive sensing, there will be numerous algorithms to achieve a workable touch-sense system. At a basic level, self-tuning done by the appliance is no different from manual tuning. Looking at Figure 7, it can be seen that some tasks are done once upon power up (one-time compensation) while other must be performed continuously (dynamic compensation).
Self-tuning capacitive sensing systems must calculate the best parameter settings for the sensors based on the appliance and expected operating environment.
Clock: The capacitive sensing systems referred to in this article are based on switched-capacitor theory. In contrast, a physical sensor capacitor is emulated to form a resistor by charging and discharging the sensor capacitor in consecutive cycles. Emulated resistance is proportional to the sensor capacitor value and is measured using a current source in conjunction with an analog-to-digital conversion stage to compute the actual value of sensor capacitor.
Proper emulation of resistance requires the sensor capacitor to be charged and discharged at a frequency that provides enough time for the capacitor to charge and discharge fully. Therefore, the switching frequency should be adjusted in accordance with the absolute sensor capacitance and should be reduced if the sensor capacitance is higher.
Resolution: Since this system converts the capacitance of the sensor to counts, the smallest change in capacitance which can be measured is dependent upon the resolution of system. The required resolution can be calculated using the parasitic capacitance and required sensitivity.
Scan Time: This is one of the most important turning parameters from a system specification point of view. However, the noise added to the system will increase as the resolution of scanning is increased. To compensate for this increase in noise, the scan time of sensors must be “stretched” to integrate the noise and reduce its effect on capacitance measurements.
A self-tuning algorithm must take care that it does not exceed the scan time beyond system requirements. The best way to deal with scan time is to lay out the board to keep parasitic capacitance as low as possible.
IDAC Value: Upon selecting the scanning resolution, a baseline measurement of the sensors (i.e. the raw count when a finger is not present) must be auto-adjusted to near 80% of the maximum count to ensure that variations in neither environmental conditions nor silicon parameters adversely affects sensor measurement precision or the capability of accurately detecting finger touch.
Noise, by its nature, is a random function of time. It is not same on power up, after one hour of operation, or at the next moment after the power up. As a consequence, the threshold value for finger detection should be adjusted based on detected noise in the sensor raw counts. Figure 8 shows how a self-tuning system can adjust the finger threshold based on system noise.
Figure 8: Dynamic finger threshold adjustment based upon noise
[Note: White--finger threshold, Blue--noise threshold, Yellow--computed noise envelope, Red--rawcount, Green--baseline]
The robustness, reliability, and efficiency of an appliance implementing self-tuning is determined mainly by two factors: SNR and Scan Time. Ensure that the SNR received from self-tuned sensors is always above the minimum requirement of 5:1 across Cp range to preserve robustness and reliability. Scan time impacts the power efficiency of the self-tuning algorithm since the more time a sensor takes to scan a sensor, the more power it consumes. Even though a higher scan time may fit application requirements, the self-tuning algorithm should optimize power consumption by cutting short the scan time to the maximum extent possible without compromising the SNR.
One of the most important aspects commonly overlooked during the initial design stage of a design is board layout since board layout affects the whole system’s performance. Parasitic capacitance impacts the amount of effort required for tuning, product yields, scan time, and other system characteristics.
Guidelines provided by the controller manufacturers should be followed while designing the layout to minimize parasitic capacitance of the sensor. These guidelines can be used to improve the performance of the system through self-tuning which assists developers in meeting changing market’s needs. Cypress, for example, provides the SmartSense self-tuning based capacitive sensing solution which automatically optimizes the scan speed to be maintained as fast as possible while minimizing power consumption and maintaining an SNR above 5:1 to avoid any false triggering.
Self-tuning controllers eliminate the overhead of repeatedly tuning capacitive sensing based appliances as specs and operating conditions changes. In certain extreme cases, a sensor’s parasitic capacitance may be very high, requiring external components and some manual tuning to maintain the capacitance within a typical range.
Manual tuning can impose significant design challenges for developers implementing capacitive sensing in appliances and other systems. Tuning is required for different lots due to process variations, whenever a board is redesigned to accommodate change in requirements (i.e., overlay thickness or button size), or because of noise/interference issues.
Tuning improves performance and reliability and can add cost and delay product release if implemented manually. Self-tuning based controllers eliminate these costs and delays, allowing developers to implement reliable systems quickly without having to become capacitive-signaling experts.
Sachin Gupta is working as Sr. Applications Engineer in Global Applications team in Cypress Semiconductor. He can be reached at firstname.lastname@example.org.
Prakhar Goyal is an Application Engineer at Cypress Semiconductor and can be reached at email@example.com
Kurian Polachan is working as Sr. Applications Engineer in Cypress Semiconductor's Consumer and Computation Division focused on CapSense applications