In my opinion, the papers of the phase change memory (PCM) session at MRS this year could be divided into two groups, those that were either updates or progress reports, offering little that was really new, while the rest were filling in the detail to account for observed and known effects in conventional PCM device materials. For this latter group, while their work is almost certainly of the highest quality, the following phrase springs to mind to summarize their activities: Filling in the potholes on the road that leads to PCM memory nowhere. There was however one very notable exception.
The new way forward
The paper  by author Semyon D. Savransky was selected for this review because it appeared to offer an entirely new direction and a new type of NV memory based on chalcogenide glasses. It does so by removing the most serious problems that have plagued PCM array progress: the high current reset pulse and, with scaling, the associated high current density and voltage.
There may be a number of secondary conventional PCM related problems that this new approach also removes, including elemental separation on crystallization and the need for an isolation device associated with each memory bit in an array. This new direction does not claim to offer an instant plug-and-play solution to the problems that so far have prevented competitive PCM arrays appearing in production and serious applications. There is still much work still to be done. However, effort in this new direction may offer significant NV memory and NV-RAM rewards.
Some may consider that PCM in the title of this article as a misnomer; no apologies are made or offered in that respect. Readers will have to accept that two different amorphous phases in the same material represent a type of phase change and the materials are from one of the chalcogenide glass families, the similarity is close enough.
Savransky's approach to NV memory uses data states that are defined by different polyamorphic states of chalcogenide glasses that are capable of switching between two disordered states. These glasses are called the polyamorphic chalcogenides (PACs). One example is Ge-Si-As-Te.
While the disorder-to-disorder transition is in itself subtle, it results in a significant and easily detectable change in another electrical characteristic, the threshold switching voltage. It is the different threshold switching voltage that defines the data states and also provides the chosen name switching memory (SM) for this proposed new family of NV memory devices.
The work described has its historical origins in threshold switch device investigations that were carried out in Russia. It is alleged that the PACs were rejected as candidate materials for threshold switches because the threshold voltage jumped between two states and was considered unstable and unsuitable for the intended purpose. Now, with hindsight, it would appear that the apparent instability was the result of the material undergoing polyamorphic changes. The PACs are relaxation semiconductors with electrical characteristics determined by recombination effects, from traps at the Fermi level.
We asked Ron Neale to select a paper from the Phase Change Memory session of the recent MRS that he considered might be able to make a significant contribution to bringing PCM to a position where competitive memory array products can be manufactured. Please make use of the comment section for questions or observations.
Volatile Memory: I think I commented in my conclusion on the use of arbitrary units as a problem. Rather than personal attacks I think the first order of business must be for an independent third party to try and reproduce the results reported by Savransky.
Resiston: I agree threshold voltage drift, or post switching recovery, will be an important consideration for PAC based SMs.
If the post switching recovery in threshold switches is the same as in PCM memory devices after reset, then that may be an important clue to the conditions, especially temperature, that exist in the conducting filament of a threshold switch. Be it PAC based or any other type for that matter.
Thank you for the review that really extends my MRS presentation.
Let me clarify some points:.
PCM as well as some of types of RRAM have low efficiency (only few percents) because of huge entropy penalties related with operation between ordered and disordered states, while switching memory SM supposes to be more total energy efficient and operates at lower currents.
Ge-Si-As-Te glass was used by Stanford Ovshinsky in stable threshold switches but to best of my knowledge it is NOT polyamorphic.
Although initial current filamentation occurs in SM devices they are NOT necessary should have pore structure, actually I used devices with structure similar to a planar capacitor. I not sure that PAC material must be deposited in the low threshold voltage state for nano-size SM devices but no studies have been performed. Initial values of threshold voltage were masked by imperfections of technology used to produce micro-size devices.
I observed a threshold voltage range of the factor slightly above2 only.
Because no detailed studies of PAC were conducted I do not have data about threshold voltage temperature coefficients.
When I made PCM presentation on behalf of Intel Corporation, managers always asked to use arbitrary units and mirror some relations to protect the company proprietary information and IP, so I learned the lesson and applied it to this MRS presentation.
I agree that threshold voltage Vth drift is possible in switching memory (SM). There are few methods to deal with drift in phase-change memory (PCM) on the active alloy, cell structure, programming pulses and array periphery levels, some of these solutions are applicable to SM. I think one of the most attractive is opportunity to use SM as DRAM with long refreshment times (about 1000 sec) there drift would not be so important.
I disagree with your assumption about destructive read. I was able indeed read low Vth few times without destruction but more studies are needed to claim fully non-destructive read, investigate drift, recovery, temperature coefficients for Vth, etc…..
The PAC films fabrication is not more difficult than fabrication of films for PCM or for threshold switches for nano-devices that have been done by Intel, Samsung and other companies.
Semyon, thanks for your reply. I was only referring to Figure 1. I accept that it would not be an issue in other cases where the current does not jump so high after exceeding Vth.
I couldn't get to attend MRS so I couldn't get to ask you other questions, such as the Tg range and also the crystallization temperature range.
Tg range is 140-270 deg. C, it can be expanded but
lower Tg glasses are not very technological and higher Tg will probably not be power efficient.
I did not observed crystallization in PAC in calorimetry and long-term storage. Based on calorimeter min heating speed estimate for crystallization energy is above 5 eV.